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Commit f80ca52c authored by Will Deacon's avatar Will Deacon
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ARM: shmobile: convert logical CPU numbers to physical numbers



This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the SCU in the SMP
boot path for sh73a0.

Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 1d3cfb34
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+5 −1
Original line number Original line Diff line number Diff line
@@ -74,6 +74,8 @@ void __cpuinit sh73a0_secondary_init(unsigned int cpu)


int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
{
{
	cpu = cpu_logical_map(cpu);

	/* enable cache coherency */
	/* enable cache coherency */
	modify_scu_cpu_psr(0, 3 << (cpu * 8));
	modify_scu_cpu_psr(0, 3 << (cpu * 8));


@@ -87,6 +89,8 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)


void __init sh73a0_smp_prepare_cpus(void)
void __init sh73a0_smp_prepare_cpus(void)
{
{
	int cpu = cpu_logical_map(0);

	scu_enable(scu_base_addr());
	scu_enable(scu_base_addr());


	/* Map the reset vector (in headsmp.S) */
	/* Map the reset vector (in headsmp.S) */
@@ -94,5 +98,5 @@ void __init sh73a0_smp_prepare_cpus(void)
	__raw_writel(__pa(shmobile_secondary_vector), __io(SBAR));
	__raw_writel(__pa(shmobile_secondary_vector), __io(SBAR));


	/* enable cache coherency on CPU0 */
	/* enable cache coherency on CPU0 */
	modify_scu_cpu_psr(0, 3 << (0 * 8));
	modify_scu_cpu_psr(0, 3 << (cpu * 8));
}
}