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Commit f7f3dc00 authored by Borislav Petkov's avatar Borislav Petkov Committed by Ingo Molnar
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x86/cpu/AMD: Fix erratum 1076 (CPB bit) 



CPUID Fn8000_0007_EDX[CPB] is wrongly 0 on models up to B1. But they do
support CPB (AMD's Core Performance Boosting cpufreq CPU feature), so fix that.

Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sherry Hurwitz <sherry.hurwitz@amd.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20170907170821.16021-1-bp@alien8.de


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 711aab1d

arch/x86/kernel/cpu/amd.c

+11 −0
Original line number Diff line number Diff line
@@ -763,6 +763,16 @@ static void init_amd_bd(struct cpuinfo_x86 *c) 
	}

}



static void init_amd_zn(struct cpuinfo_x86 *c)

{

	/*

	 * Fix erratum 1076: CPB feature bit not being set in CPUID. It affects

	 * all up to and including B1.

	 */

	if (c->x86_model <= 1 && c->x86_mask <= 1)

		set_cpu_cap(c, X86_FEATURE_CPB);

}



static void init_amd(struct cpuinfo_x86 *c)

{

	early_init_amd(c);
@@ -791,6 +801,7 @@ static void init_amd(struct cpuinfo_x86 *c) 
	case 0x10: init_amd_gh(c); break;

	case 0x12: init_amd_ln(c); break;

	case 0x15: init_amd_bd(c); break;

	case 0x17: init_amd_zn(c); break;

	}



	/* Enable workaround for FXSAVE leak */