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Commit f7c799e9 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Vinod Koul
Browse files

dmaengine: dw: we do support Merrifield SoC in PCI mode



Intel Merrifield platform contains Intel integrated DMA (iDMA 32-bit) which has
a slightly different register mapping, e.g. some bits in CTL_* and CFG_*
channel registers, and has to use platform data since there is no
autoconfiguration.

The iDMA 32-bit specification is available in the publicly available
documentation for Intel Braswell and BayTrail SoCs as LPE Audio DMA.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 199244d6
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+15 −0
Original line number Original line Diff line number Diff line
@@ -15,6 +15,18 @@


#include "internal.h"
#include "internal.h"


static struct dw_dma_platform_data mrfld_pdata = {
	.nr_channels = 8,
	.is_private = true,
	.is_memcpy = true,
	.is_idma32 = true,
	.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
	.chan_priority = CHAN_PRIORITY_ASCENDING,
	.block_size = 131071,
	.nr_masters = 1,
	.data_width = {4},
};

static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
{
{
	const struct dw_dma_platform_data *pdata = (void *)pid->driver_data;
	const struct dw_dma_platform_data *pdata = (void *)pid->driver_data;
@@ -103,6 +115,9 @@ static const struct pci_device_id dw_pci_id_table[] = {
	{ PCI_VDEVICE(INTEL, 0x0f06) },
	{ PCI_VDEVICE(INTEL, 0x0f06) },
	{ PCI_VDEVICE(INTEL, 0x0f40) },
	{ PCI_VDEVICE(INTEL, 0x0f40) },


	/* Merrifield iDMA 32-bit (GPDMA) */
	{ PCI_VDEVICE(INTEL, 0x11a2), (kernel_ulong_t)&mrfld_pdata },

	/* Braswell */
	/* Braswell */
	{ PCI_VDEVICE(INTEL, 0x2286) },
	{ PCI_VDEVICE(INTEL, 0x2286) },
	{ PCI_VDEVICE(INTEL, 0x22c0) },
	{ PCI_VDEVICE(INTEL, 0x22c0) },