Loading qcom/lito.dtsi +14 −14 Original line number Diff line number Diff line Loading @@ -77,7 +77,7 @@ L1_I_0: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_0: l1-dcache { Loading @@ -86,7 +86,7 @@ }; L2_TLB_0: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -110,7 +110,7 @@ L1_I_100: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_100: l1-dcache { Loading @@ -119,7 +119,7 @@ }; L2_TLB_100: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -143,7 +143,7 @@ L1_I_200: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_200: l1-dcache { Loading @@ -152,7 +152,7 @@ }; L2_TLB_200: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -176,7 +176,7 @@ L1_I_300: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_300: l1-dcache { Loading @@ -185,7 +185,7 @@ }; L2_TLB_300: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -210,7 +210,7 @@ L1_I_400: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_400: l1-dcache { Loading @@ -219,7 +219,7 @@ }; L2_TLB_400: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -243,7 +243,7 @@ L1_I_500: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_500: l1-dcache { Loading @@ -252,7 +252,7 @@ }; L2_TLB_500: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -278,7 +278,7 @@ L1_I_600: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x11000>; qcom,dump-size = <0x21000>; }; L1_D_600: l1-dcache { Loading Loading @@ -321,7 +321,7 @@ L1_I_700: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x11000>; qcom,dump-size = <0x21000>; }; L1_D_700: l1-dcache { Loading Loading
qcom/lito.dtsi +14 −14 Original line number Diff line number Diff line Loading @@ -77,7 +77,7 @@ L1_I_0: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_0: l1-dcache { Loading @@ -86,7 +86,7 @@ }; L2_TLB_0: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -110,7 +110,7 @@ L1_I_100: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_100: l1-dcache { Loading @@ -119,7 +119,7 @@ }; L2_TLB_100: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -143,7 +143,7 @@ L1_I_200: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_200: l1-dcache { Loading @@ -152,7 +152,7 @@ }; L2_TLB_200: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -176,7 +176,7 @@ L1_I_300: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_300: l1-dcache { Loading @@ -185,7 +185,7 @@ }; L2_TLB_300: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -210,7 +210,7 @@ L1_I_400: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_400: l1-dcache { Loading @@ -219,7 +219,7 @@ }; L2_TLB_400: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -243,7 +243,7 @@ L1_I_500: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_500: l1-dcache { Loading @@ -252,7 +252,7 @@ }; L2_TLB_500: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -278,7 +278,7 @@ L1_I_600: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x11000>; qcom,dump-size = <0x21000>; }; L1_D_600: l1-dcache { Loading Loading @@ -321,7 +321,7 @@ L1_I_700: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x11000>; qcom,dump-size = <0x21000>; }; L1_D_700: l1-dcache { Loading