Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f7633ce5 authored by Maciej W. Rozycki's avatar Maciej W. Rozycki Committed by Ingo Molnar
Browse files

x86: I/O APIC: rename setup_ExtINT_IRQ0_pin()



Rename setup_ExtINT_IRQ0_pin() to setup_timer_IRQ0_pin() to better
reflect the upcoming role of a function setting up a (semi-)arbitrary I/O
APIC pin appropriately for the 8254 timer.  By "appropriate" the following
settings are meant: edge-triggered, active-high, all the other settings
per-architecture.  Adjust comments to reflect code appropriately.  No
functional changes.

Signed-off-by: default avatarMaciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 6b4722a7
Loading
Loading
Loading
Loading
+5 −4
Original line number Diff line number Diff line
@@ -1302,9 +1302,10 @@ static void __init setup_IO_APIC_irqs(void)
}

/*
 * Set up the 8259A-master output pin:
 * Set up the timer pin, possibly with the 8259A-master behind.
 */
static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, int vector)
static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
					int vector)
{
	struct IO_APIC_route_entry entry;

@@ -1324,7 +1325,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in

	/*
	 * The timer IRQ doesn't have to know that behind the
	 * scene we have a 8259A-master in AEOI mode ...
	 * scene we may have a 8259A-master in AEOI mode ...
	 */
	ioapic_register_intr(0, vector, IOAPIC_EDGE);

@@ -2183,7 +2184,7 @@ static inline void __init check_timer(void)
		/*
		 * legacy devices should be connected to IO APIC #0
		 */
		setup_ExtINT_IRQ0_pin(apic2, pin2, vector);
		setup_timer_IRQ0_pin(apic2, pin2, vector);
		enable_8259A_irq(0);
		if (timer_irq_works()) {
			printk("works.\n");
+5 −5
Original line number Diff line number Diff line
@@ -897,10 +897,10 @@ static void __init setup_IO_APIC_irqs(void)
}

/*
 * Set up the 8259A-master output pin as broadcast to all
 * CPUs.
 * Set up the timer pin, possibly with the 8259A-master behind.
 */
static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, int vector)
static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
					int vector)
{
	struct IO_APIC_route_entry entry;

@@ -920,7 +920,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in

	/*
	 * The timer IRQ doesn't have to know that behind the
	 * scene we have a 8259A-master in AEOI mode ...
	 * scene we may have a 8259A-master in AEOI mode ...
	 */
	set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge");

@@ -1690,7 +1690,7 @@ static inline void __init check_timer(void)
		/*
		 * legacy devices should be connected to IO APIC #0
		 */
		setup_ExtINT_IRQ0_pin(apic2, pin2, cfg->vector);
		setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
		enable_8259A_irq(0);
		if (timer_irq_works()) {
			apic_printk(APIC_VERBOSE," works.\n");