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Commit f66dc723 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'dma-mapping-4.19' of git://git.infradead.org/users/hch/dma-mapping

Pull dma-mapping updates from Christoph Hellwig:

 - a series from Robin to fix bus imposed dma limits by adding a
   separate mask for them to struct device instead of trying to squeeze
   a second meaning out of the existing dma mask as we did before.

   This has ACKs from the various other subsystems touched

 - a small swiotlb cleanup from Kees (acked by Konrad)

 - conversion of nios2 and sh to the new generic dma-noncoherent code.

   Various other architecture conversions will come through the
   architectures maintainers trees.

* tag 'dma-mapping-4.19' of git://git.infradead.org/users/hch/dma-mapping:
  sh: use generic dma_noncoherent_ops
  sh: split arch/sh/mm/consistent.c
  sh: use dma_direct_ops for the CONFIG_DMA_COHERENT case
  sh: introduce a sh_cacheop_vaddr helper
  sh: simplify get_arch_dma_ops
  OF: Don't set default coherent DMA mask
  ACPI/IORT: Don't set default coherent DMA mask
  iommu/dma: Respect bus DMA limit for IOVAs
  of/device: Set bus DMA mask as appropriate
  ACPI/IORT: Set bus DMA mask as appropriate
  dma-mapping: Generalise dma_32bit_limit flag
  ACPI/IORT: Support address size limit for root complexes
  of/platform: Initialise default DMA masks
  nios2: use generic dma_noncoherent_ops
  swiotlb: clean up reporting
  dma-mapping: relax warning for per-device areas
parents b219a1d2 6fa1d28e
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+3 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
config NIOS2
	def_bool y
	select ARCH_HAS_SYNC_DMA_FOR_CPU
	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
	select DMA_NONCOHERENT_OPS
	select TIMER_OF
	select GENERIC_ATOMIC64
	select GENERIC_CLOCKEVENTS
+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ generic-y += current.h
generic-y += device.h
generic-y += div64.h
generic-y += dma.h
generic-y += dma-mapping.h
generic-y += emergency-restart.h
generic-y += exec.h
generic-y += extable.h
+0 −20
Original line number Diff line number Diff line
/*
 * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
 * Copyright (C) 2009 Wind River Systems Inc
 *
 * This file is subject to the terms and conditions of the GNU General
 * Public License.  See the file COPYING in the main directory of this
 * archive for more details.
 */

#ifndef _ASM_NIOS2_DMA_MAPPING_H
#define _ASM_NIOS2_DMA_MAPPING_H

extern const struct dma_map_ops nios2_dma_ops;

static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
{
	return &nios2_dma_ops;
}

#endif /* _ASM_NIOS2_DMA_MAPPING_H */
+13 −126
Original line number Diff line number Diff line
@@ -12,18 +12,18 @@

#include <linux/types.h>
#include <linux/mm.h>
#include <linux/export.h>
#include <linux/string.h>
#include <linux/scatterlist.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <linux/cache.h>
#include <asm/cacheflush.h>

static inline void __dma_sync_for_device(void *vaddr, size_t size,
			      enum dma_data_direction direction)
void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
		size_t size, enum dma_data_direction dir)
{
	switch (direction) {
	void *vaddr = phys_to_virt(paddr);

	switch (dir) {
	case DMA_FROM_DEVICE:
		invalidate_dcache_range((unsigned long)vaddr,
			(unsigned long)(vaddr + size));
@@ -42,10 +42,12 @@ static inline void __dma_sync_for_device(void *vaddr, size_t size,
	}
}

static inline void __dma_sync_for_cpu(void *vaddr, size_t size,
			      enum dma_data_direction direction)
void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
		size_t size, enum dma_data_direction dir)
{
	switch (direction) {
	void *vaddr = phys_to_virt(paddr);

	switch (dir) {
	case DMA_BIDIRECTIONAL:
	case DMA_FROM_DEVICE:
		invalidate_dcache_range((unsigned long)vaddr,
@@ -58,8 +60,8 @@ static inline void __dma_sync_for_cpu(void *vaddr, size_t size,
	}
}

static void *nios2_dma_alloc(struct device *dev, size_t size,
		dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
		gfp_t gfp, unsigned long attrs)
{
	void *ret;

@@ -80,125 +82,10 @@ static void *nios2_dma_alloc(struct device *dev, size_t size,
	return ret;
}

static void nios2_dma_free(struct device *dev, size_t size, void *vaddr,
void arch_dma_free(struct device *dev, size_t size, void *vaddr,
		dma_addr_t dma_handle, unsigned long attrs)
{
	unsigned long addr = (unsigned long) CAC_ADDR((unsigned long) vaddr);

	free_pages(addr, get_order(size));
}

static int nios2_dma_map_sg(struct device *dev, struct scatterlist *sg,
		int nents, enum dma_data_direction direction,
		unsigned long attrs)
{
	int i;

	for_each_sg(sg, sg, nents, i) {
		void *addr = sg_virt(sg);

		if (!addr)
			continue;

		sg->dma_address = sg_phys(sg);

		if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
			continue;

		__dma_sync_for_device(addr, sg->length, direction);
	}

	return nents;
}

static dma_addr_t nios2_dma_map_page(struct device *dev, struct page *page,
			unsigned long offset, size_t size,
			enum dma_data_direction direction,
			unsigned long attrs)
{
	void *addr = page_address(page) + offset;

	if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
		__dma_sync_for_device(addr, size, direction);

	return page_to_phys(page) + offset;
}

static void nios2_dma_unmap_page(struct device *dev, dma_addr_t dma_address,
		size_t size, enum dma_data_direction direction,
		unsigned long attrs)
{
	if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
		__dma_sync_for_cpu(phys_to_virt(dma_address), size, direction);
}

static void nios2_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
		int nhwentries, enum dma_data_direction direction,
		unsigned long attrs)
{
	void *addr;
	int i;

	if (direction == DMA_TO_DEVICE)
		return;

	if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
		return;

	for_each_sg(sg, sg, nhwentries, i) {
		addr = sg_virt(sg);
		if (addr)
			__dma_sync_for_cpu(addr, sg->length, direction);
	}
}

static void nios2_dma_sync_single_for_cpu(struct device *dev,
		dma_addr_t dma_handle, size_t size,
		enum dma_data_direction direction)
{
	__dma_sync_for_cpu(phys_to_virt(dma_handle), size, direction);
}

static void nios2_dma_sync_single_for_device(struct device *dev,
		dma_addr_t dma_handle, size_t size,
		enum dma_data_direction direction)
{
	__dma_sync_for_device(phys_to_virt(dma_handle), size, direction);
}

static void nios2_dma_sync_sg_for_cpu(struct device *dev,
		struct scatterlist *sg, int nelems,
		enum dma_data_direction direction)
{
	int i;

	/* Make sure that gcc doesn't leave the empty loop body.  */
	for_each_sg(sg, sg, nelems, i)
		__dma_sync_for_cpu(sg_virt(sg), sg->length, direction);
}

static void nios2_dma_sync_sg_for_device(struct device *dev,
		struct scatterlist *sg, int nelems,
		enum dma_data_direction direction)
{
	int i;

	/* Make sure that gcc doesn't leave the empty loop body.  */
	for_each_sg(sg, sg, nelems, i)
		__dma_sync_for_device(sg_virt(sg), sg->length, direction);

}

const struct dma_map_ops nios2_dma_ops = {
	.alloc			= nios2_dma_alloc,
	.free			= nios2_dma_free,
	.map_page		= nios2_dma_map_page,
	.unmap_page		= nios2_dma_unmap_page,
	.map_sg			= nios2_dma_map_sg,
	.unmap_sg		= nios2_dma_unmap_sg,
	.sync_single_for_device	= nios2_dma_sync_single_for_device,
	.sync_single_for_cpu	= nios2_dma_sync_single_for_cpu,
	.sync_sg_for_cpu	= nios2_dma_sync_sg_for_cpu,
	.sync_sg_for_device	= nios2_dma_sync_sg_for_device,
};
EXPORT_SYMBOL(nios2_dma_ops);
+3 −1
Original line number Diff line number Diff line
@@ -51,7 +51,6 @@ config SUPERH
	select HAVE_ARCH_AUDITSYSCALL
	select HAVE_FUTEX_CMPXCHG if FUTEX
	select HAVE_NMI
	select NEED_DMA_MAP_STATE
	select NEED_SG_DMA_LENGTH

	help
@@ -159,10 +158,13 @@ config SWAP_IO_SPACE
	bool

config DMA_COHERENT
	select DMA_DIRECT_OPS
	bool

config DMA_NONCOHERENT
	def_bool !DMA_COHERENT
	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
	select DMA_NONCOHERENT_OPS

config PGTABLE_LEVELS
	default 3 if X2TLB
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