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Commit f4c607dc authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville
Browse files

ath9k_hw: remove pCap->total_queues 



The EEPROM contains a field that can restrict the number of hardware queues,
however this is not only useless (all the known chips contain the same
number of hardware queues), but also potentially dangerous in case of a
misprogrammed EEPROM (could trigger driver crashes), so let's just ignore
it completely.

Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent a9b6b256

drivers/net/wireless/ath/ath9k/hw.c

+1 −7
Original line number Diff line number Diff line
@@ -1437,7 +1437,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, 
	REGWRITE_BUFFER_FLUSH(ah);



	ah->intr_txqs = 0;

	for (i = 0; i < ah->caps.total_queues; i++)

	for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)

		ath9k_hw_resettxqueue(ah, i);



	ath9k_hw_init_interrupt_masks(ah, ah->opmode);
@@ -1885,12 +1885,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) 
	else

		pCap->hw_caps &= ~ATH9K_HW_CAP_HT;



	if (capField & AR_EEPROM_EEPCAP_MAXQCU)

		pCap->total_queues =

			MS(capField, AR_EEPROM_EEPCAP_MAXQCU);

	else

		pCap->total_queues = ATH9K_NUM_TX_QUEUES;



	if (capField & AR_EEPROM_EEPCAP_KC_ENTRIES)

		pCap->keycache_size =

			1 << MS(capField, AR_EEPROM_EEPCAP_KC_ENTRIES);

drivers/net/wireless/ath/ath9k/hw.h

+0 −1
Original line number Diff line number Diff line
@@ -191,7 +191,6 @@ enum ath9k_hw_caps { 


struct ath9k_hw_capabilities {

	u32 hw_caps; /* ATH9K_HW_CAP_* from ath9k_hw_caps */

	u16 total_queues;

	u16 keycache_size;

	u16 low_5ghz_chan, high_5ghz_chan;

	u16 low_2ghz_chan, high_2ghz_chan;

drivers/net/wireless/ath/ath9k/mac.c

+5 −33
Original line number Diff line number Diff line
@@ -209,15 +209,8 @@ bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q, 
{

	u32 cw;

	struct ath_common *common = ath9k_hw_common(ah);

	struct ath9k_hw_capabilities *pCap = &ah->caps;

	struct ath9k_tx_queue_info *qi;



	if (q >= pCap->total_queues) {

		ath_dbg(common, ATH_DBG_QUEUE,

			"Set TXQ properties, invalid queue: %u\n", q);

		return false;

	}



	qi = &ah->txq[q];

	if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {

		ath_dbg(common, ATH_DBG_QUEUE,
@@ -280,15 +273,8 @@ bool ath9k_hw_get_txq_props(struct ath_hw *ah, int q, 
			    struct ath9k_tx_queue_info *qinfo)

{

	struct ath_common *common = ath9k_hw_common(ah);

	struct ath9k_hw_capabilities *pCap = &ah->caps;

	struct ath9k_tx_queue_info *qi;



	if (q >= pCap->total_queues) {

		ath_dbg(common, ATH_DBG_QUEUE,

			"Get TXQ properties, invalid queue: %u\n", q);

		return false;

	}



	qi = &ah->txq[q];

	if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {

		ath_dbg(common, ATH_DBG_QUEUE,
@@ -320,28 +306,27 @@ int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type, 
{

	struct ath_common *common = ath9k_hw_common(ah);

	struct ath9k_tx_queue_info *qi;

	struct ath9k_hw_capabilities *pCap = &ah->caps;

	int q;



	switch (type) {

	case ATH9K_TX_QUEUE_BEACON:

		q = pCap->total_queues - 1;

		q = ATH9K_NUM_TX_QUEUES - 1;

		break;

	case ATH9K_TX_QUEUE_CAB:

		q = pCap->total_queues - 2;

		q = ATH9K_NUM_TX_QUEUES - 2;

		break;

	case ATH9K_TX_QUEUE_PSPOLL:

		q = 1;

		break;

	case ATH9K_TX_QUEUE_UAPSD:

		q = pCap->total_queues - 3;

		q = ATH9K_NUM_TX_QUEUES - 3;

		break;

	case ATH9K_TX_QUEUE_DATA:

		for (q = 0; q < pCap->total_queues; q++)

		for (q = 0; q < ATH9K_NUM_TX_QUEUES; q++)

			if (ah->txq[q].tqi_type ==

			    ATH9K_TX_QUEUE_INACTIVE)

				break;

		if (q == pCap->total_queues) {

		if (q == ATH9K_NUM_TX_QUEUES) {

			ath_err(common, "No available TX queue\n");

			return -1;

		}
@@ -382,15 +367,9 @@ EXPORT_SYMBOL(ath9k_hw_setuptxqueue); 


bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q)

{

	struct ath9k_hw_capabilities *pCap = &ah->caps;

	struct ath_common *common = ath9k_hw_common(ah);

	struct ath9k_tx_queue_info *qi;



	if (q >= pCap->total_queues) {

		ath_dbg(common, ATH_DBG_QUEUE,

			"Release TXQ, invalid queue: %u\n", q);

		return false;

	}

	qi = &ah->txq[q];

	if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {

		ath_dbg(common, ATH_DBG_QUEUE,
@@ -414,18 +393,11 @@ EXPORT_SYMBOL(ath9k_hw_releasetxqueue); 


bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)

{

	struct ath9k_hw_capabilities *pCap = &ah->caps;

	struct ath_common *common = ath9k_hw_common(ah);

	struct ath9k_channel *chan = ah->curchan;

	struct ath9k_tx_queue_info *qi;

	u32 cwMin, chanCwMin, value;



	if (q >= pCap->total_queues) {

		ath_dbg(common, ATH_DBG_QUEUE,

			"Reset TXQ, invalid queue: %u\n", q);

		return false;

	}



	qi = &ah->txq[q];

	if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {

		ath_dbg(common, ATH_DBG_QUEUE,