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Commit f47671e2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm 

Pull ARM updates from Russell King:
 "Included in this series are:

   1. BE8 (modern big endian) changes for ARM from Ben Dooks
   2. big.Little support from Nicolas Pitre and Dave Martin
   3. support for LPAE systems with all system memory above 4GB
   4. Perf updates from Will Deacon
   5. Additional prefetching and other performance improvements from Will.
   6. Neon-optimised AES implementation fro Ard.
   7. A number of smaller fixes scattered around the place.

  There is a rather horrid merge conflict in tools/perf - I was never
  notified of the conflict because it originally occurred between Will's
  tree and other stuff.  Consequently I have a resolution which Will
  forwarded me, which I'll forward on immediately after sending this
  mail.

  The other notable thing is I'm expecting some build breakage in the
  crypto stuff on ARM only with Ard's AES patches.  These were merged
  into a stable git branch which others had already pulled, so there's
  little I can do about this.  The problem is caused because these
  patches have a dependency on some code in the crypto git tree - I
  tried requesting a branch I can pull to resolve these, and all I got
  each time from the crypto people was "we'll revert our patches then"
  which would only make things worse since I still don't have the
  dependent patches.  I've no idea what's going on there or how to
  resolve that, and since I can't split these patches from the rest of
  this pull request, I'm rather stuck with pushing this as-is or
  reverting Ard's patches.

  Since it should "come out in the wash" I've left them in - the only
  build problems they seem to cause at the moment are with randconfigs,
  and since it's a new feature anyway.  However, if by -rc1 the
  dependencies aren't in, I think it'd be best to revert Ard's patches"

I resolved the perf conflict roughly as per the patch sent by Russell,
but there may be some differences.  Any errors are likely mine.  Let's
see how the crypto issues work out..

* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (110 commits)
  ARM: 7868/1: arm/arm64: remove atomic_clear_mask() in "include/asm/atomic.h"
  ARM: 7867/1: include: asm: use 'int' instead of 'unsigned long' for 'oldval' in atomic_cmpxchg().
  ARM: 7866/1: include: asm: use 'long long' instead of 'u64' within atomic.h
  ARM: 7871/1: amba: Extend number of IRQS
  ARM: 7887/1: Don't smp_cross_call() on UP devices in arch_irq_work_raise()
  ARM: 7872/1: Support arch_irq_work_raise() via self IPIs
  ARM: 7880/1: Clear the IT state independent of the Thumb-2 mode
  ARM: 7878/1: nommu: Implement dummy early_paging_init()
  ARM: 7876/1: clear Thumb-2 IT state on exception handling
  ARM: 7874/2: bL_switcher: Remove cpu_hotplug_driver_{lock,unlock}()
  ARM: footbridge: fix build warnings for netwinder
  ARM: 7873/1: vfp: clear vfp_current_hw_state for dying cpu
  ARM: fix misplaced arch_virt_to_idmap()
  ARM: 7848/1: mcpm: Implement cpu_kill() to synchronise on powerdown
  ARM: 7847/1: mcpm: Factor out logical-to-physical CPU translation
  ARM: 7869/1: remove unused XSCALE_PMU Kconfig param
  ARM: 7864/1: Handle 64-bit memory in case of 32-bit phys_addr_t
  ARM: 7863/1: Let arm_add_memory() always use 64-bit arguments
  ARM: 7862/1: pcpu: replace __get_cpu_var_uses
  ARM: 7861/1: cacheflush: consolidate single-CPU ARMv7 cache disabling code
  ...
parents 8ceafbfa 42cbe827

arch/arm/Kconfig

+30 −6
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ config ARM 
	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE

	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST

	select ARCH_HAVE_CUSTOM_GPIO_H

	select ARCH_USE_CMPXCHG_LOCKREF

	select ARCH_WANT_IPC_PARSE_VERSION

	select BUILDTIME_EXTABLE_SORT if MMU

	select CLONE_BACKWARDS
@@ -51,6 +52,8 @@ config ARM 
	select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND

	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)

	select HAVE_PERF_EVENTS

	select HAVE_PERF_REGS

	select HAVE_PERF_USER_STACK_DUMP

	select HAVE_REGS_AND_STACK_ACCESS_API

	select HAVE_SYSCALL_TRACEPOINTS

	select HAVE_UID16
@@ -481,6 +484,7 @@ config ARCH_IXP4XX 
	bool "IXP4xx-based"

	depends on MMU

	select ARCH_HAS_DMA_SET_COHERENT_MASK

	select ARCH_SUPPORTS_BIG_ENDIAN

	select ARCH_REQUIRE_GPIOLIB

	select CLKSRC_MMIO

	select CPU_XSCALE
@@ -688,7 +692,6 @@ config ARCH_SA1100 
	select GENERIC_CLOCKEVENTS

	select HAVE_IDE

	select ISA

	select NEED_MACH_GPIO_H

	select NEED_MACH_MEMORY_H

	select SPARSE_IRQ

	help
@@ -1064,11 +1067,6 @@ config IWMMXT 
	  Enable support for iWMMXt context switching at run time if

	  running on a CPU that supports it.



config XSCALE_PMU

	bool

	depends on CPU_XSCALE

	default y



config MULTI_IRQ_HANDLER

	bool

	help
@@ -1516,6 +1514,32 @@ config MCPM 
	  for (multi-)cluster based systems, such as big.LITTLE based

	  systems.



config BIG_LITTLE

	bool "big.LITTLE support (Experimental)"

	depends on CPU_V7 && SMP

	select MCPM

	help

	  This option enables support selections for the big.LITTLE

	  system architecture.



config BL_SWITCHER

	bool "big.LITTLE switcher support"

	depends on BIG_LITTLE && MCPM && HOTPLUG_CPU

	select CPU_PM

	select ARM_CPU_SUSPEND

	help

	  The big.LITTLE "switcher" provides the core functionality to

	  transparently handle transition between a cluster of A15's

	  and a cluster of A7's in a big.LITTLE system.



config BL_SWITCHER_DUMMY_IF

	tristate "Simple big.LITTLE switcher user interface"

	depends on BL_SWITCHER && DEBUG_KERNEL

	help

	  This is a simple and dummy char dev interface to control

	  the big.LITTLE switcher core code.  It is meant for

	  debugging purposes only.



choice

	prompt "Memory split"

	default VMSPLIT_3G

arch/arm/Kconfig.debug

+36 −5
Original line number Diff line number Diff line
@@ -318,6 +318,7 @@ choice 
	config DEBUG_MSM_UART1

		bool "Kernel low-level debugging messages via MSM UART1"

		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50

		select DEBUG_MSM_UART

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the first serial port on MSM devices.
@@ -325,6 +326,7 @@ choice 
	config DEBUG_MSM_UART2

		bool "Kernel low-level debugging messages via MSM UART2"

		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50

		select DEBUG_MSM_UART

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the second serial port on MSM devices.
@@ -332,6 +334,7 @@ choice 
	config DEBUG_MSM_UART3

		bool "Kernel low-level debugging messages via MSM UART3"

		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50

		select DEBUG_MSM_UART

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the third serial port on MSM devices.
@@ -340,6 +343,7 @@ choice 
		bool "Kernel low-level debugging messages via MSM 8660 UART"

		depends on ARCH_MSM8X60

		select MSM_HAS_DEBUG_UART_HS

		select DEBUG_MSM_UART

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the serial port on MSM 8660 devices.
@@ -348,10 +352,20 @@ choice 
		bool "Kernel low-level debugging messages via MSM 8960 UART"

		depends on ARCH_MSM8960

		select MSM_HAS_DEBUG_UART_HS

		select DEBUG_MSM_UART

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the serial port on MSM 8960 devices.



	config DEBUG_MSM8974_UART

		bool "Kernel low-level debugging messages via MSM 8974 UART"

		depends on ARCH_MSM8974

		select MSM_HAS_DEBUG_UART_HS

		select DEBUG_MSM_UART

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the serial port on MSM 8974 devices.



	config DEBUG_MVEBU_UART

		bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"

		depends on ARCH_MVEBU
@@ -841,6 +855,20 @@ choice 
		  options; the platform specific options are deprecated

		  and will be soon removed.



	config DEBUG_LL_UART_EFM32

		bool "Kernel low-level debugging via efm32 UART"

		depends on ARCH_EFM32

		help

		  Say Y here if you want the debug print routines to direct

		  their output to an UART or USART port on efm32 based

		  machines. Use the following addresses for DEBUG_UART_PHYS:



		    0x4000c000 | USART0

		    0x4000c400 | USART1

		    0x4000c800 | USART2

		    0x4000e000 | UART0

		    0x4000e400 | UART1



	config DEBUG_LL_UART_PL01X

		bool "Kernel low-level debugging via ARM Ltd PL01x Primecell UART"

		help
@@ -887,11 +915,16 @@ config DEBUG_STI_UART 
	bool

	depends on ARCH_STI



config DEBUG_MSM_UART

	bool

	depends on ARCH_MSM



config DEBUG_LL_INCLUDE

	string

	default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250

	default "debug/pl01x.S" if DEBUG_LL_UART_PL01X || DEBUG_UART_PL01X

	default "debug/exynos.S" if DEBUG_EXYNOS_UART

	default "debug/efm32.S" if DEBUG_LL_UART_EFM32

	default "debug/icedcc.S" if DEBUG_ICEDCC

	default "debug/imx.S" if DEBUG_IMX1_UART || \

				 DEBUG_IMX25_UART || \
@@ -902,11 +935,7 @@ config DEBUG_LL_INCLUDE 
				 DEBUG_IMX53_UART ||\

				 DEBUG_IMX6Q_UART || \

				 DEBUG_IMX6SL_UART

	default "debug/msm.S" if DEBUG_MSM_UART1 || \

				 DEBUG_MSM_UART2 || \

				 DEBUG_MSM_UART3 || \

				 DEBUG_MSM8660_UART || \

				 DEBUG_MSM8960_UART

	default "debug/msm.S" if DEBUG_MSM_UART

	default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART

	default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1

	default "debug/sti.S" if DEBUG_STI_UART
@@ -959,6 +988,7 @@ config DEBUG_UART_PHYS 
	default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2

	default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3

	default 0x20201000 if DEBUG_BCM2835

	default 0x4000e400 if DEBUG_LL_UART_EFM32

	default 0x40090000 if ARCH_LPC32XX

	default 0x40100000 if DEBUG_PXA_UART1

	default 0x42000000 if ARCH_GEMINI
@@ -989,6 +1019,7 @@ config DEBUG_UART_PHYS 
	default 0xfff36000 if DEBUG_HIGHBANK_UART

	default 0xfffff700 if ARCH_IOP33X

	depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \

		DEBUG_LL_UART_EFM32 || \

		DEBUG_UART_8250 || DEBUG_UART_PL01X



config DEBUG_UART_VIRT

arch/arm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ LDFLAGS := 
LDFLAGS_vmlinux	:=-p --no-undefined -X

ifeq ($(CONFIG_CPU_ENDIAN_BE8),y)

LDFLAGS_vmlinux	+= --be8

LDFLAGS_MODULE	+= --be8

endif



OBJCOPYFLAGS	:=-O binary -R .comment -S

arch/arm/boot/compressed/head.S

+3 −6
Original line number Diff line number Diff line
@@ -135,6 +135,7 @@ start: 
		.word	_edata			@ zImage end address

 THUMB(		.thumb			)

1:

 ARM_BE8(	setend	be )			@ go BE8 if compiled for BE8

		mrs	r9, cpsr

#ifdef CONFIG_ARM_VIRT_EXT

		bl	__hyp_stub_install	@ get into SVC mode, reversibly
@@ -699,9 +700,7 @@ __armv4_mmu_cache_on: 
		mrc	p15, 0, r0, c1, c0, 0	@ read control reg

		orr	r0, r0, #0x5000		@ I-cache enable, RR cache replacement

		orr	r0, r0, #0x0030

#ifdef CONFIG_CPU_ENDIAN_BE8

		orr	r0, r0, #1 << 25	@ big-endian page tables

#endif

 ARM_BE8(	orr	r0, r0, #1 << 25 )	@ big-endian page tables

		bl	__common_mmu_cache_on

		mov	r0, #0

		mcr	p15, 0, r0, c8, c7, 0	@ flush I,D TLBs
@@ -728,9 +727,7 @@ __armv7_mmu_cache_on: 
		orr	r0, r0, #1 << 22	@ U (v6 unaligned access model)

						@ (needed for ARM1176)

#ifdef CONFIG_MMU

#ifdef CONFIG_CPU_ENDIAN_BE8

		orr	r0, r0, #1 << 25	@ big-endian page tables

#endif

 ARM_BE8(	orr	r0, r0, #1 << 25 )	@ big-endian page tables

		mrcne   p15, 0, r6, c2, c0, 2   @ read ttb control reg

		orrne	r0, r0, #1		@ MMU enabled

		movne	r1, #0xfffffffd		@ domain 0 = client

arch/arm/common/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -16,3 +16,5 @@ obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o 
AFLAGS_mcpm_head.o		:= -march=armv7-a

AFLAGS_vlock.o			:= -march=armv7-a

obj-$(CONFIG_TI_PRIV_EDMA)	+= edma.o

obj-$(CONFIG_BL_SWITCHER)	+= bL_switcher.o

obj-$(CONFIG_BL_SWITCHER_DUMMY_IF) += bL_switcher_dummy_if.o