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Commit f3c91c1d authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Only save/restore cursor regs if !KMS 



Under KMS, restoring the cursor is handled upon modeswitch in order to
avoid enabling an undefined set of registers. At the moment, the cursor
is restored before the aperture and modes are fully setup causing some
invalid access during resume, such as:

  PGTBL_ER: 0x00040000
    Invalid GTT entry during Cursor Fetch

Fix this by only performing cursor register save/restore under UMS where
it is done in the correct sequence.

Reported-by: default avatarArkadiusz Miskiewicz <arekm@maven.pl>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent d1d78830

drivers/gpu/drm/i915/i915_suspend.c

+20 −20
Original line number Diff line number Diff line
@@ -239,6 +239,16 @@ static void i915_save_modeset_reg(struct drm_device *dev) 
	if (drm_core_check_feature(dev, DRIVER_MODESET))

		return;



	/* Cursor state */

	dev_priv->saveCURACNTR = I915_READ(CURACNTR);

	dev_priv->saveCURAPOS = I915_READ(CURAPOS);

	dev_priv->saveCURABASE = I915_READ(CURABASE);

	dev_priv->saveCURBCNTR = I915_READ(CURBCNTR);

	dev_priv->saveCURBPOS = I915_READ(CURBPOS);

	dev_priv->saveCURBBASE = I915_READ(CURBBASE);

	if (IS_GEN2(dev))

		dev_priv->saveCURSIZE = I915_READ(CURSIZE);



	if (HAS_PCH_SPLIT(dev)) {

		dev_priv->savePCH_DREF_CONTROL = I915_READ(PCH_DREF_CONTROL);

		dev_priv->saveDISP_ARB_CTL = I915_READ(DISP_ARB_CTL);
@@ -529,6 +539,16 @@ static void i915_restore_modeset_reg(struct drm_device *dev) 
	I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR);

	I915_WRITE(DSPBADDR, I915_READ(DSPBADDR));



	/* Cursor state */

	I915_WRITE(CURAPOS, dev_priv->saveCURAPOS);

	I915_WRITE(CURACNTR, dev_priv->saveCURACNTR);

	I915_WRITE(CURABASE, dev_priv->saveCURABASE);

	I915_WRITE(CURBPOS, dev_priv->saveCURBPOS);

	I915_WRITE(CURBCNTR, dev_priv->saveCURBCNTR);

	I915_WRITE(CURBBASE, dev_priv->saveCURBBASE);

	if (IS_GEN2(dev))

		I915_WRITE(CURSIZE, dev_priv->saveCURSIZE);



	return;

}
@@ -543,16 +563,6 @@ void i915_save_display(struct drm_device *dev) 
	/* Don't save them in KMS mode */

	i915_save_modeset_reg(dev);



	/* Cursor state */

	dev_priv->saveCURACNTR = I915_READ(CURACNTR);

	dev_priv->saveCURAPOS = I915_READ(CURAPOS);

	dev_priv->saveCURABASE = I915_READ(CURABASE);

	dev_priv->saveCURBCNTR = I915_READ(CURBCNTR);

	dev_priv->saveCURBPOS = I915_READ(CURBPOS);

	dev_priv->saveCURBBASE = I915_READ(CURBBASE);

	if (IS_GEN2(dev))

		dev_priv->saveCURSIZE = I915_READ(CURSIZE);



	/* CRT state */

	if (HAS_PCH_SPLIT(dev)) {

		dev_priv->saveADPA = I915_READ(PCH_ADPA);
@@ -657,16 +667,6 @@ void i915_restore_display(struct drm_device *dev) 
	/* Don't restore them in KMS mode */

	i915_restore_modeset_reg(dev);



	/* Cursor state */

	I915_WRITE(CURAPOS, dev_priv->saveCURAPOS);

	I915_WRITE(CURACNTR, dev_priv->saveCURACNTR);

	I915_WRITE(CURABASE, dev_priv->saveCURABASE);

	I915_WRITE(CURBPOS, dev_priv->saveCURBPOS);

	I915_WRITE(CURBCNTR, dev_priv->saveCURBCNTR);

	I915_WRITE(CURBBASE, dev_priv->saveCURBBASE);

	if (IS_GEN2(dev))

		I915_WRITE(CURSIZE, dev_priv->saveCURSIZE);



	/* CRT state */

	if (HAS_PCH_SPLIT(dev))

		I915_WRITE(PCH_ADPA, dev_priv->saveADPA);