Loading msm/vidc/msm_venc.c +32 −0 Original line number Diff line number Diff line Loading @@ -1003,6 +1003,15 @@ static struct msm_vidc_ctrl msm_venc_ctrls[] = { ), .qmenu = roi_map_type, }, { .id = V4L2_CID_MPEG_VIDC_ENABLE_ONLY_BASE_LAYER_IR, .name = "Enable Only Base Layer IR", .type = V4L2_CTRL_TYPE_BOOLEAN, .minimum = V4L2_MPEG_MSM_VIDC_DISABLE, .maximum = V4L2_MPEG_MSM_VIDC_ENABLE, .default_value = V4L2_MPEG_MSM_VIDC_DISABLE, .step = 1, }, }; #define NUM_CTRLS ARRAY_SIZE(msm_venc_ctrls) Loading Loading @@ -1971,6 +1980,7 @@ int msm_venc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) case V4L2_CID_MPEG_VIDC_VENC_BITRATE_SAVINGS: case V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET: case V4L2_CID_MPEG_VIDC_SUPERFRAME: case V4L2_CID_MPEG_VIDC_ENABLE_ONLY_BASE_LAYER_IR: s_vpr_h(sid, "Control set: ID : 0x%x Val : %d\n", ctrl->id, ctrl->val); break; Loading Loading @@ -3266,6 +3276,9 @@ int msm_venc_set_intra_refresh_mode(struct msm_vidc_inst *inst) struct v4l2_ctrl *ctrl = NULL; struct hfi_intra_refresh intra_refresh; struct v4l2_format *f; struct hfi_enable enable; struct v4l2_ctrl *layer = NULL; struct v4l2_ctrl *max_layer = NULL; if (!inst || !inst->core) { d_vpr_e("%s: invalid params %pK\n", __func__, inst); Loading @@ -3277,6 +3290,13 @@ int msm_venc_set_intra_refresh_mode(struct msm_vidc_inst *inst) inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR)) return 0; /* Check for base layer only intra refresh in case of multiple layers */ layer = get_ctrl(inst, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER); max_layer = get_ctrl(inst, V4L2_CID_MPEG_VIDC_VIDEO_HEVC_MAX_HIER_CODING_LAYER); ctrl = get_ctrl(inst, V4L2_CID_MPEG_VIDC_ENABLE_ONLY_BASE_LAYER_IR); enable.enable = !!ctrl->val; intra_refresh.mode = HFI_INTRA_REFRESH_RANDOM; ctrl = get_ctrl(inst, V4L2_CID_MPEG_VIDC_VIDEO_INTRA_REFRESH_RANDOM); Loading @@ -3301,6 +3321,18 @@ int msm_venc_set_intra_refresh_mode(struct msm_vidc_inst *inst) if (!intra_refresh.mbs) { intra_refresh.mode = HFI_INTRA_REFRESH_NONE; intra_refresh.mbs = 0; } else { if (enable.enable && layer->val && max_layer->val) { s_vpr_h(inst->sid, "%s: Enable only base layer IR:%d\n", __func__, enable.enable); rc = call_hfi_op(hdev, session_set_property, inst->session, HFI_PROPERTY_PARAM_ENABLE_ONLY_BASE_LAYER_IR, &enable, sizeof(enable)); if (rc) s_vpr_e(inst->sid, "%s: set property failed\n", __func__); } } s_vpr_h(inst->sid, "%s: %d %d\n", __func__, Loading msm/vidc/vidc_hfi_helper.h +2 −0 Original line number Diff line number Diff line Loading @@ -352,6 +352,8 @@ struct hfi_buffer_info { (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x039) #define HFI_PROPERTY_PARAM_HEVC_PPS_CB_CR_OFFSET \ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x040) #define HFI_PROPERTY_PARAM_ENABLE_ONLY_BASE_LAYER_IR \ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x041) #define HFI_PROPERTY_CONFIG_VENC_COMMON_START \ (HFI_DOMAIN_BASE_VENC + HFI_ARCH_COMMON_OFFSET + 0x6000) Loading Loading
msm/vidc/msm_venc.c +32 −0 Original line number Diff line number Diff line Loading @@ -1003,6 +1003,15 @@ static struct msm_vidc_ctrl msm_venc_ctrls[] = { ), .qmenu = roi_map_type, }, { .id = V4L2_CID_MPEG_VIDC_ENABLE_ONLY_BASE_LAYER_IR, .name = "Enable Only Base Layer IR", .type = V4L2_CTRL_TYPE_BOOLEAN, .minimum = V4L2_MPEG_MSM_VIDC_DISABLE, .maximum = V4L2_MPEG_MSM_VIDC_ENABLE, .default_value = V4L2_MPEG_MSM_VIDC_DISABLE, .step = 1, }, }; #define NUM_CTRLS ARRAY_SIZE(msm_venc_ctrls) Loading Loading @@ -1971,6 +1980,7 @@ int msm_venc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) case V4L2_CID_MPEG_VIDC_VENC_BITRATE_SAVINGS: case V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET: case V4L2_CID_MPEG_VIDC_SUPERFRAME: case V4L2_CID_MPEG_VIDC_ENABLE_ONLY_BASE_LAYER_IR: s_vpr_h(sid, "Control set: ID : 0x%x Val : %d\n", ctrl->id, ctrl->val); break; Loading Loading @@ -3266,6 +3276,9 @@ int msm_venc_set_intra_refresh_mode(struct msm_vidc_inst *inst) struct v4l2_ctrl *ctrl = NULL; struct hfi_intra_refresh intra_refresh; struct v4l2_format *f; struct hfi_enable enable; struct v4l2_ctrl *layer = NULL; struct v4l2_ctrl *max_layer = NULL; if (!inst || !inst->core) { d_vpr_e("%s: invalid params %pK\n", __func__, inst); Loading @@ -3277,6 +3290,13 @@ int msm_venc_set_intra_refresh_mode(struct msm_vidc_inst *inst) inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR)) return 0; /* Check for base layer only intra refresh in case of multiple layers */ layer = get_ctrl(inst, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER); max_layer = get_ctrl(inst, V4L2_CID_MPEG_VIDC_VIDEO_HEVC_MAX_HIER_CODING_LAYER); ctrl = get_ctrl(inst, V4L2_CID_MPEG_VIDC_ENABLE_ONLY_BASE_LAYER_IR); enable.enable = !!ctrl->val; intra_refresh.mode = HFI_INTRA_REFRESH_RANDOM; ctrl = get_ctrl(inst, V4L2_CID_MPEG_VIDC_VIDEO_INTRA_REFRESH_RANDOM); Loading @@ -3301,6 +3321,18 @@ int msm_venc_set_intra_refresh_mode(struct msm_vidc_inst *inst) if (!intra_refresh.mbs) { intra_refresh.mode = HFI_INTRA_REFRESH_NONE; intra_refresh.mbs = 0; } else { if (enable.enable && layer->val && max_layer->val) { s_vpr_h(inst->sid, "%s: Enable only base layer IR:%d\n", __func__, enable.enable); rc = call_hfi_op(hdev, session_set_property, inst->session, HFI_PROPERTY_PARAM_ENABLE_ONLY_BASE_LAYER_IR, &enable, sizeof(enable)); if (rc) s_vpr_e(inst->sid, "%s: set property failed\n", __func__); } } s_vpr_h(inst->sid, "%s: %d %d\n", __func__, Loading
msm/vidc/vidc_hfi_helper.h +2 −0 Original line number Diff line number Diff line Loading @@ -352,6 +352,8 @@ struct hfi_buffer_info { (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x039) #define HFI_PROPERTY_PARAM_HEVC_PPS_CB_CR_OFFSET \ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x040) #define HFI_PROPERTY_PARAM_ENABLE_ONLY_BASE_LAYER_IR \ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x041) #define HFI_PROPERTY_CONFIG_VENC_COMMON_START \ (HFI_DOMAIN_BASE_VENC + HFI_ARCH_COMMON_OFFSET + 0x6000) Loading