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Commit f0ad8412 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'imx-soc-4.19' of... 

Merge tag 'imx-soc-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc

i.MX SoC update for 4.19:
 - A series from Anson Huang to add power management for i.MX6SLL,
   including standby and mem mode suspend, cpuidle support, and bus
   clock auto gating function, etc.
 - A couple of fix-ups on i.MX6SLL cpuidle random build issues.
 - A couple of cleanups on stale EPIT timer initialization and RNGA
   platform device registration function.
 - Configure i.MX51 SoC M4IF to avoid visual artifacts during video
   playback.
 - Set up i.MX51 and i.MX53 DBGEN bit of ARM_GPC register, so that
   clocks within the debug system can be activated.
 - Add a Cortex-M4 platform support which will be useful for running
   a Linux instance on Cortex-M4 core integrated in i.MX7D SoC.
 - Flag of_iomap failure in imx_aips_allow_unprivileged_access()
   function by giving a warning in there.

* tag 'imx-soc-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux

:
  ARM: mx5: Set the DBGEN bit in ARM_GPC register
  ARM: imx51: Configure M4IF to avoid visual artifacts
  ARM: imx: call imx6sx_cpuidle_init() conditionally for 6sll
  ARM: imx: fix i.MX6SLL build
  ARM: imx: flag failure of of_iomap
  ARM: i.MX31: remove rnga registration as a platform device
  ARM: imx: Provide support for NXP i.MX7D Cortex-M4
  ARM: imx: enable bus auto clock gating function for i.mx6sll
  ARM: imx: remove i.MX6SLL support in i.MX6SL cpu idle driver
  ARM: imx: add cpu idle support for i.MX6SLL
  ARM: imx: add L2 page power control for GPC
  ARM: imx: add mem mode suspend for i.MX6SLL
  ARM: imx: add standby mode suspend for i.MX6SLL
  ARM: imx: remove inexistant EPIT timer init

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents b598b3aa 26b754f9

arch/arm/mach-imx/Kconfig

+21 −12
Original line number Diff line number Diff line
@@ -523,18 +523,6 @@ config SOC_IMX6UL 
	help

	  This enables support for Freescale i.MX6 UltraLite processor.



config SOC_IMX7D

	bool "i.MX7 Dual support"

	select PINCTRL_IMX7D

	select ARM_GIC

	select HAVE_ARM_ARCH_TIMER

	select HAVE_IMX_ANATOP

	select HAVE_IMX_MMDC

	select HAVE_IMX_SRC

	select IMX_GPCV2

	help

		This enables support for Freescale i.MX7 Dual processor.



config SOC_LS1021A

	bool "Freescale LS1021A support"

	select ARM_GIC
@@ -549,6 +537,27 @@ comment "Cortex-A/Cortex-M asymmetric multiprocessing platforms" 


if ARCH_MULTI_V7 || ARM_SINGLE_ARMV7M



config SOC_IMX7D_CA7

	bool

	select ARM_GIC

	select HAVE_ARM_ARCH_TIMER

	select HAVE_IMX_ANATOP

	select HAVE_IMX_MMDC

	select HAVE_IMX_SRC

	select IMX_GPCV2



config SOC_IMX7D_CM4

	bool

	select ARMV7M_SYSTICK



config SOC_IMX7D

	bool "i.MX7 Dual support"

	select PINCTRL_IMX7D

	select SOC_IMX7D_CA7 if ARCH_MULTI_V7

	select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M

	help

		This enables support for Freescale i.MX7 Dual processor.



config SOC_VF610

	bool "Vybrid Family VF610 support"

	select ARM_GIC if ARCH_MULTI_V7

arch/arm/mach-imx/Makefile

+3 −2
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ ifeq ($(CONFIG_CPU_IDLE),y) 
obj-$(CONFIG_SOC_IMX5) += cpuidle-imx5.o

obj-$(CONFIG_SOC_IMX6Q) += cpuidle-imx6q.o

obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o

obj-$(CONFIG_SOC_IMX6SLL) += cpuidle-imx6sl.o

obj-$(CONFIG_SOC_IMX6SLL) += cpuidle-imx6sx.o

obj-$(CONFIG_SOC_IMX6SX) += cpuidle-imx6sx.o

obj-$(CONFIG_SOC_IMX6UL) += cpuidle-imx6sx.o

endif
@@ -81,7 +81,8 @@ obj-$(CONFIG_SOC_IMX6SL) += mach-imx6sl.o 
obj-$(CONFIG_SOC_IMX6SLL) += mach-imx6sl.o

obj-$(CONFIG_SOC_IMX6SX) += mach-imx6sx.o

obj-$(CONFIG_SOC_IMX6UL) += mach-imx6ul.o

obj-$(CONFIG_SOC_IMX7D) += mach-imx7d.o

obj-$(CONFIG_SOC_IMX7D_CA7) += mach-imx7d.o

obj-$(CONFIG_SOC_IMX7D_CM4) += mach-imx7d-cm4.o



ifeq ($(CONFIG_SUSPEND),y)

AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a

arch/arm/mach-imx/common.h

+2 −1
Original line number Diff line number Diff line
@@ -38,7 +38,6 @@ void imx21_soc_init(void); 
void imx27_soc_init(void);

void imx31_soc_init(void);

void imx35_soc_init(void);

void epit_timer_init(void __iomem *base, int irq);

int mx21_clocks_init(unsigned long lref, unsigned long fref);

int mx27_clocks_init(unsigned long fref);

int mx31_clocks_init(unsigned long fref);
@@ -58,10 +57,12 @@ struct device *imx_soc_device_init(void); 
void imx6_enable_rbc(bool enable);

void imx_gpc_check_dt(void);

void imx_gpc_set_arm_power_in_lpm(bool power_off);

void imx_gpc_set_l2_mem_power_in_lpm(bool power_off);

void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw);

void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw);

void imx25_pm_init(void);

void imx27_pm_init(void);

void imx5_pmu_init(void);



enum mxc_cpu_pwr_mode {

	WAIT_CLOCKED,		/* wfi only */

arch/arm/mach-imx/cpu-imx5.c

+45 −0
Original line number Diff line number Diff line
@@ -117,3 +117,48 @@ int mx53_revision(void) 
	return mx5_cpu_rev;

}

EXPORT_SYMBOL(mx53_revision);



#define ARM_GPC		0x4

#define DBGEN		BIT(16)



/*

 * This enables the DBGEN bit in ARM_GPC register, which is

 * required for accessing some performance counter features.

 * Technically it is only required while perf is used, but to

 * keep the source code simple we just enable it all the time

 * when the kernel configuration allows using the feature.

 */

void __init imx5_pmu_init(void)

{

	void __iomem *tigerp_base;

	struct device_node *np;

	u32 gpc;



	if (!IS_ENABLED(CONFIG_ARM_PMU))

		return;



	np = of_find_compatible_node(NULL, NULL, "arm,cortex-a8-pmu");

	if (!np)

		return;



	if (!of_property_read_bool(np, "secure-reg-access"))

		goto exit;



	of_node_put(np);



	np = of_find_compatible_node(NULL, NULL, "fsl,imx51-tigerp");

	if (!np)

		return;



	tigerp_base = of_iomap(np, 0);

	if (!tigerp_base)

		goto exit;



	gpc = readl_relaxed(tigerp_base + ARM_GPC);

	gpc |= DBGEN;

	writel_relaxed(gpc, tigerp_base + ARM_GPC);

	iounmap(tigerp_base);

exit:

	of_node_put(np);



}

arch/arm/mach-imx/cpu.c

+1 −0
Original line number Diff line number Diff line
@@ -68,6 +68,7 @@ void __init imx_aips_allow_unprivileged_access( 


	for_each_compatible_node(np, NULL, compat) {

		aips_base_addr = of_iomap(np, 0);

		WARN_ON(!aips_base_addr);

		imx_set_aips(aips_base_addr);

	}

}