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Commit f06ffdfb authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Simon Horman
Browse files

arm64: dts: r8a7796: Add VSP instances 



The r8a7796 has 5 VSP instances.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 41dbbf0c

arch/arm64/boot/dts/renesas/r8a7796.dtsi

+55 −0
Original line number Diff line number Diff line
@@ -1570,6 +1570,17 @@ 
			resets = <&cpg 615>;

		};



		vspb: vsp@fe960000 {

			compatible = "renesas,vsp2";

			reg = <0 0xfe960000 0 0x8000>;

			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 626>;

			power-domains = <&sysc R8A7796_PD_A3VC>;

			resets = <&cpg 626>;



			renesas,fcp = <&fcpvb0>;

		};



		fcpvb0: fcp@fe96f000 {

			compatible = "renesas,fcpv";

			reg = <0 0xfe96f000 0 0x200>;
@@ -1578,6 +1589,17 @@ 
			resets = <&cpg 607>;

		};



		vspi0: vsp@fe9a0000 {

			compatible = "renesas,vsp2";

			reg = <0 0xfe9a0000 0 0x8000>;

			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 631>;

			power-domains = <&sysc R8A7796_PD_A3VC>;

			resets = <&cpg 631>;



			renesas,fcp = <&fcpvi0>;

		};



		fcpvi0: fcp@fe9af000 {

			compatible = "renesas,fcpv";

			reg = <0 0xfe9af000 0 0x200>;
@@ -1586,6 +1608,17 @@ 
			resets = <&cpg 611>;

		};



		vspd0: vsp@fea20000 {

			compatible = "renesas,vsp2";

			reg = <0 0xfea20000 0 0x4000>;

			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 623>;

			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;

			resets = <&cpg 623>;



			renesas,fcp = <&fcpvd0>;

		};



		fcpvd0: fcp@fea27000 {

			compatible = "renesas,fcpv";

			reg = <0 0xfea27000 0 0x200>;
@@ -1594,6 +1627,17 @@ 
			resets = <&cpg 603>;

		};



		vspd1: vsp@fea28000 {

			compatible = "renesas,vsp2";

			reg = <0 0xfea28000 0 0x4000>;

			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 622>;

			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;

			resets = <&cpg 622>;



			renesas,fcp = <&fcpvd1>;

		};



		fcpvd1: fcp@fea2f000 {

			compatible = "renesas,fcpv";

			reg = <0 0xfea2f000 0 0x200>;
@@ -1602,6 +1646,17 @@ 
			resets = <&cpg 602>;

		};



		vspd2: vsp@fea30000 {

			compatible = "renesas,vsp2";

			reg = <0 0xfea30000 0 0x4000>;

			interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 621>;

			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;

			resets = <&cpg 621>;



			renesas,fcp = <&fcpvd2>;

		};



		fcpvd2: fcp@fea37000 {

			compatible = "renesas,fcpv";

			reg = <0 0xfea37000 0 0x200>;