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Commit eef57324 authored by Jerome Anand's avatar Jerome Anand Committed by Takashi Iwai
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drm/i915: setup bridge for HDMI LPE audio driver 



Enable support for HDMI LPE audio mode on Baytrail and
Cherrytrail when HDaudio controller is not detected

Setup minimum required resources during i915_driver_load:
1. Create a platform device to share MMIO/IRQ resources
2. Make the platform device child of i915 device for runtime PM.
3. Create IRQ chip to forward HDMI LPE audio irqs.

HDMI LPE audio driver (a standalone sound driver) probes the
LPE audio device and creates a new sound card.

Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: default avatarJerome Anand <jerome.anand@intel.com>
Acked-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 7a308bb3

Documentation/gpu/i915.rst

+9 −0
Original line number Diff line number Diff line
@@ -213,6 +213,15 @@ Video BIOS Table (VBT) 
.. kernel-doc:: drivers/gpu/drm/i915/intel_vbt_defs.h

   :internal:



intel hdmi lpe audio support

----------------------------



.. kernel-doc:: drivers/gpu/drm/i915/intel_lpe_audio.c

   :doc:  LPE Audio integration for HDMI or DP playback



.. kernel-doc:: drivers/gpu/drm/i915/intel_lpe_audio.c

   :internal:



Memory Management and Command Submission

========================================

drivers/gpu/drm/i915/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -122,6 +122,9 @@ i915-y += intel_gvt.o 
include $(src)/gvt/Makefile

endif



# LPE Audio for VLV and CHT

i915-y += intel_lpe_audio.o



obj-$(CONFIG_DRM_I915) += i915.o



CFLAGS_i915_trace_points.o := -I$(src)

drivers/gpu/drm/i915/i915_drv.c

+2 −2
Original line number Diff line number Diff line
@@ -1138,7 +1138,7 @@ static void i915_driver_register(struct drm_i915_private *dev_priv) 
	if (IS_GEN5(dev_priv))

		intel_gpu_ips_init(dev_priv);



	i915_audio_component_init(dev_priv);

	intel_audio_init(dev_priv);



	/*

	 * Some ports require correctly set-up hpd registers for detection to
@@ -1156,7 +1156,7 @@ static void i915_driver_register(struct drm_i915_private *dev_priv) 
 */

static void i915_driver_unregister(struct drm_i915_private *dev_priv)

{

	i915_audio_component_cleanup(dev_priv);

	intel_audio_deinit(dev_priv);



	intel_gpu_ips_teardown();

	acpi_video_unregister();

drivers/gpu/drm/i915/i915_drv.h

+11 −0
Original line number Diff line number Diff line
@@ -2136,6 +2136,12 @@ struct drm_i915_private { 
	/* Used to save the pipe-to-encoder mapping for audio */

	struct intel_encoder *av_enc_map[I915_MAX_PIPES];



	/* necessary resource sharing with HDMI LPE audio driver. */

	struct {

		struct platform_device *platdev;

		int	irq;

	} lpe_audio;



	/*

	 * NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch

	 * will be rejected. Instead look for a better place.
@@ -3390,6 +3396,11 @@ extern int i915_restore_state(struct drm_device *dev); 
void i915_setup_sysfs(struct drm_i915_private *dev_priv);

void i915_teardown_sysfs(struct drm_i915_private *dev_priv);



/* intel_lpe_audio.c */

int  intel_lpe_audio_init(struct drm_i915_private *dev_priv);

void intel_lpe_audio_teardown(struct drm_i915_private *dev_priv);

void intel_lpe_audio_irq_handler(struct drm_i915_private *dev_priv);



/* intel_i2c.c */

extern int intel_setup_gmbus(struct drm_device *dev);

extern void intel_teardown_gmbus(struct drm_device *dev);

drivers/gpu/drm/i915/i915_irq.c

+16 −0
Original line number Diff line number Diff line
@@ -1893,6 +1893,10 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg) 
		 * signalled in iir */

		valleyview_pipestat_irq_ack(dev_priv, iir, pipe_stats);



		if (iir & (I915_LPE_PIPE_A_INTERRUPT |

			   I915_LPE_PIPE_B_INTERRUPT))

			intel_lpe_audio_irq_handler(dev_priv);



		/*

		 * VLV_IIR is single buffered, and reflects the level

		 * from PIPESTAT/PORT_HOTPLUG_STAT, hence clear it last.
@@ -1973,6 +1977,11 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg) 
		 * signalled in iir */

		valleyview_pipestat_irq_ack(dev_priv, iir, pipe_stats);



		if (iir & (I915_LPE_PIPE_A_INTERRUPT |

			   I915_LPE_PIPE_B_INTERRUPT |

			   I915_LPE_PIPE_C_INTERRUPT))

			intel_lpe_audio_irq_handler(dev_priv);



		/*

		 * VLV_IIR is single buffered, and reflects the level

		 * from PIPESTAT/PORT_HOTPLUG_STAT, hence clear it last.
@@ -2914,6 +2923,7 @@ static void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv) 
	u32 pipestat_mask;

	u32 enable_mask;

	enum pipe pipe;

	u32 val;



	pipestat_mask = PLANE_FLIP_DONE_INT_STATUS_VLV |

			PIPE_CRC_DONE_INTERRUPT_STATUS;
@@ -2930,6 +2940,12 @@ static void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv) 


	WARN_ON(dev_priv->irq_mask != ~0);



	val = (I915_LPE_PIPE_A_INTERRUPT |

		I915_LPE_PIPE_B_INTERRUPT |

		I915_LPE_PIPE_C_INTERRUPT);



	enable_mask |= val;



	dev_priv->irq_mask = ~enable_mask;



	GEN5_IRQ_INIT(VLV_, dev_priv->irq_mask, enable_mask);