Commit eee25ab1 authored Jun 28, 2016 by Hans de Goede Committed by Maxime Ripard Jun 29, 2016

ARM: dts: sun7i: Fix pll3x2 and pll7x2 not having a parent clock

Fix pll3x2 and pll7x2 not having a parent clock, specifically this
fixes the kernel turning of pll3 while simplefb is using it when
uboot has configured things to use pll3x2 as lcd ch clk parent.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

parent b3b630b2

arch/arm/boot/dts/sun7i-a20.dtsi

+2 −0

Original line number	Diff line number	Diff line
		@@ -232,6 +232,7 @@
		pll3x2: pll3x2_clk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&pll3>;
		clock-div = <1>;
		clock-mult = <2>;
		clock-output-names = "pll3-2x";
		@@ -273,6 +274,7 @@
		pll7x2: pll7x2_clk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&pll7>;
		clock-div = <1>;
		clock-mult = <2>;
		clock-output-names = "pll7-2x";