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Commit ee5d35e7 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'for-v4.2-rc/omap-fixes-a' of...

Merge tag 'for-v4.2-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes

Merge "ARM: OMAP2+: hwmod fixes for v4.2-rc" from Paul Walmsley:

ARM: OMAP2+: hwmod fixes for v4.2-rc

Two fixes against v4.2-rc1.  The first, for DRA7xx platforms,
corrects some incorrect GPMC hardware description data.  The
second one will ensure that the hwmod code will wait for any
module with CPU-accessible registers to become ready before
attempting to access it.

Basic build, boot, and PM test logs are available here:

http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.2-rc/20150723065408/

Note that I do not have a DRA7xx or AM43xx board, and therefore
cannot test on those platforms.

* tag 'for-v4.2-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending

:
  ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
  ARM: DRA7: hwmod: fix gpmc hwmod

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 82567c85 9a258afa
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+16 −8
Original line number Diff line number Diff line
@@ -2373,6 +2373,9 @@ static int of_dev_hwmod_lookup(struct device_node *np,
 * registers.  This address is needed early so the OCP registers that
 * are part of the device's address space can be ioremapped properly.
 *
 * If SYSC access is not needed, the registers will not be remapped
 * and non-availability of MPU access is not treated as an error.
 *
 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
 * -ENXIO on absent or invalid register target address space.
 */
@@ -2387,6 +2390,11 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,

	_save_mpu_port_index(oh);

	/* if we don't need sysc access we don't need to ioremap */
	if (!oh->class->sysc)
		return 0;

	/* we can't continue without MPU PORT if we need sysc access */
	if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
		return -ENXIO;

@@ -2396,8 +2404,10 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
			 oh->name);

		/* Extract the IO space from device tree blob */
		if (!np)
		if (!np) {
			pr_err("omap_hwmod: %s: no dt node\n", oh->name);
			return -ENXIO;
		}

		va_start = of_iomap(np, index + oh->mpu_rt_idx);
	} else {
@@ -2456,14 +2466,12 @@ static int __init _init(struct omap_hwmod *oh, void *data)
				oh->name, np->name);
	}

	if (oh->class->sysc) {
	r = _init_mpu_rt_base(oh, NULL, index, np);
	if (r < 0) {
		WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
		     oh->name);
		return 0;
	}
	}

	r = _init_clocks(oh, NULL);
	if (r < 0) {
+2 −3
Original line number Diff line number Diff line
@@ -827,8 +827,7 @@ static struct omap_hwmod_class_sysconfig dra7xx_gpmc_sysc = {
	.syss_offs	= 0x0014,
	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
			   SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
			   SIDLE_SMART_WKUP),
	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
	.sysc_fields	= &omap_hwmod_sysc_type1,
};

@@ -844,7 +843,7 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = {
	.class		= &dra7xx_gpmc_hwmod_class,
	.clkdm_name	= "l3main1_clkdm",
	/* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */
	.flags		= HWMOD_SWSUP_SIDLE | DEBUG_OMAP_GPMC_HWMOD_FLAGS,
	.flags		= DEBUG_OMAP_GPMC_HWMOD_FLAGS,
	.main_clk	= "l3_iclk_div",
	.prcm = {
		.omap4 = {