drm/i915: Make fbc control wrapper functions (ee5382ae) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/gpu/drm/i915/i915_debugfs.c

+2 −11

Original line number	Original line	Diff line number	Diff line
	@@ -566,23 +566,14 @@ static int i915_fbc_status(struct seq_file m, void unused)
	{		{
	struct drm_info_node node = (struct drm_info_node ) m->private;		struct drm_info_node node = (struct drm_info_node ) m->private;
	struct drm_device *dev = node->minor->dev;		struct drm_device *dev = node->minor->dev;
	struct drm_crtc *crtc;
	drm_i915_private_t *dev_priv = dev->dev_private;		drm_i915_private_t *dev_priv = dev->dev_private;
	bool fbc_enabled = false;

	if (!dev_priv->display.fbc_enabled) {		if (!I915_HAS_FBC(dev)) {
	seq_printf(m, "FBC unsupported on this chipset\n");		seq_printf(m, "FBC unsupported on this chipset\n");
	return 0;		return 0;
	}		}

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {		if (intel_fbc_enabled(dev)) {
	if (!crtc->enabled)
	continue;
	if (dev_priv->display.fbc_enabled(crtc))
	fbc_enabled = true;
	}

	if (fbc_enabled) {
	seq_printf(m, "FBC enabled\n");		seq_printf(m, "FBC enabled\n");
	} else {		} else {
	seq_printf(m, "FBC disabled: ");		seq_printf(m, "FBC disabled: ");

drivers/gpu/drm/i915/i915_dma.c

+1 −2

Original line number	Original line	Diff line number	Diff line
	@@ -1357,11 +1357,10 @@ static void i915_setup_compression(struct drm_device *dev, int size)

	dev_priv->cfb_size = size;		dev_priv->cfb_size = size;

			intel_disable_fbc(dev);
	if (IS_GM45(dev)) {		if (IS_GM45(dev)) {
	g4x_disable_fbc(dev);
	I915_WRITE(DPFC_CB_BASE, compressed_fb->start);		I915_WRITE(DPFC_CB_BASE, compressed_fb->start);
	} else {		} else {
	i8xx_disable_fbc(dev);
	I915_WRITE(FBC_CFB_BASE, cfb_base);		I915_WRITE(FBC_CFB_BASE, cfb_base);
	I915_WRITE(FBC_LL_BASE, ll_base);		I915_WRITE(FBC_LL_BASE, ll_base);
	}		}

drivers/gpu/drm/i915/i915_drv.h

+4 −1

drivers/gpu/drm/i915/intel_display.c

+44 −22

Original line number	Original line	Diff line number	Diff line
	@@ -1048,9 +1048,8 @@ void i8xx_disable_fbc(struct drm_device *dev)
	DRM_DEBUG_KMS("disabled FBC\n");		DRM_DEBUG_KMS("disabled FBC\n");
	}		}

	static bool i8xx_fbc_enabled(struct drm_crtc *crtc)		static bool i8xx_fbc_enabled(struct drm_device *dev)
	{		{
	struct drm_device *dev = crtc->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;

	return I915_READ(FBC_CONTROL) & FBC_CTL_EN;		return I915_READ(FBC_CONTROL) & FBC_CTL_EN;
	@@ -1107,14 +1106,43 @@ void g4x_disable_fbc(struct drm_device *dev)
	DRM_DEBUG_KMS("disabled FBC\n");		DRM_DEBUG_KMS("disabled FBC\n");
	}		}

	static bool g4x_fbc_enabled(struct drm_crtc *crtc)		static bool g4x_fbc_enabled(struct drm_device *dev)
	{		{
	struct drm_device *dev = crtc->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;

	return I915_READ(DPFC_CONTROL) & DPFC_CTL_EN;		return I915_READ(DPFC_CONTROL) & DPFC_CTL_EN;
	}		}

			bool intel_fbc_enabled(struct drm_device *dev)
			{
			struct drm_i915_private *dev_priv = dev->dev_private;

			if (!dev_priv->display.fbc_enabled)
			return false;

			return dev_priv->display.fbc_enabled(dev);
			}

			void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
			{
			struct drm_i915_private *dev_priv = crtc->dev->dev_private;

			if (!dev_priv->display.enable_fbc)
			return;

			dev_priv->display.enable_fbc(crtc, interval);
			}

			void intel_disable_fbc(struct drm_device *dev)
			{
			struct drm_i915_private *dev_priv = dev->dev_private;

			if (!dev_priv->display.disable_fbc)
			return;

			dev_priv->display.disable_fbc(dev);
			}

	/**		/**
	* intel_update_fbc - enable/disable FBC as needed		* intel_update_fbc - enable/disable FBC as needed
	* @crtc: CRTC to point the compressor at		* @crtc: CRTC to point the compressor at
	@@ -1149,9 +1177,7 @@ static void intel_update_fbc(struct drm_crtc *crtc,
	if (!i915_powersave)		if (!i915_powersave)
	return;		return;

	if (!dev_priv->display.fbc_enabled \|\|		if (!I915_HAS_FBC(dev))
	!dev_priv->display.enable_fbc \|\|
	!dev_priv->display.disable_fbc)
	return;		return;

	if (!crtc->fb)		if (!crtc->fb)
	@@ -1198,28 +1224,25 @@ static void intel_update_fbc(struct drm_crtc *crtc,
	goto out_disable;		goto out_disable;
	}		}

	if (dev_priv->display.fbc_enabled(crtc)) {		if (intel_fbc_enabled(dev)) {
	/* We can re-enable it in this case, but need to update pitch */		/* We can re-enable it in this case, but need to update pitch */
	if (fb->pitch > dev_priv->cfb_pitch)		if ((fb->pitch > dev_priv->cfb_pitch) \|\|
	dev_priv->display.disable_fbc(dev);		(obj_priv->fence_reg != dev_priv->cfb_fence) \|\|
	if (obj_priv->fence_reg != dev_priv->cfb_fence)		(plane != dev_priv->cfb_plane))
	dev_priv->display.disable_fbc(dev);		intel_disable_fbc(dev);
	if (plane != dev_priv->cfb_plane)
	dev_priv->display.disable_fbc(dev);
	}		}

	if (!dev_priv->display.fbc_enabled(crtc)) {
	/* Now try to turn it back on if possible */		/* Now try to turn it back on if possible */
	dev_priv->display.enable_fbc(crtc, 500);		if (!intel_fbc_enabled(dev))
	}		intel_enable_fbc(crtc, 500);

	return;		return;

	out_disable:		out_disable:
	DRM_DEBUG_KMS("unsupported config, disabling FBC\n");		DRM_DEBUG_KMS("unsupported config, disabling FBC\n");
	/* Multiple disables should be harmless */		/* Multiple disables should be harmless */
	if (dev_priv->display.fbc_enabled(crtc))		if (intel_fbc_enabled(dev))
	dev_priv->display.disable_fbc(dev);		intel_disable_fbc(dev);
	}		}

	static int		static int
	@@ -5203,8 +5226,7 @@ static void intel_init_display(struct drm_device *dev)
	else		else
	dev_priv->display.dpms = i9xx_crtc_dpms;		dev_priv->display.dpms = i9xx_crtc_dpms;

	/* Only mobile has FBC, leave pointers NULL for other chips */		if (I915_HAS_FBC(dev)) {
	if (IS_MOBILE(dev)) {
	if (IS_GM45(dev)) {		if (IS_GM45(dev)) {
	dev_priv->display.fbc_enabled = g4x_fbc_enabled;		dev_priv->display.fbc_enabled = g4x_fbc_enabled;
	dev_priv->display.enable_fbc = g4x_enable_fbc;		dev_priv->display.enable_fbc = g4x_enable_fbc;