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Commit ee1fd870 authored by Igal Liberman's avatar Igal Liberman Committed by Herbert Xu
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crypto: inside-secure - optimize DSE bufferability control 



Configure the data write bufferability to always buffer packets in the
DSE. This change slightly improves performance.

Signed-off-by: default avatarIgal Liberman <igall@marvell.com>
Signed-off-by: default avatarAntoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent c87925bf

drivers/crypto/inside-secure/safexcel.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -329,6 +329,7 @@ static int safexcel_hw_init(struct safexcel_crypto_priv *priv) 
	val = EIP197_HIA_DSE_CFG_DIS_DEBUG;

	val = EIP197_HIA_DSE_CFG_DIS_DEBUG;

	val |= EIP197_HIA_DxE_CFG_MIN_DATA_SIZE(7) | EIP197_HIA_DxE_CFG_MAX_DATA_SIZE(8);

	val |= EIP197_HIA_DxE_CFG_MIN_DATA_SIZE(7) | EIP197_HIA_DxE_CFG_MAX_DATA_SIZE(8);

	val |= EIP197_HIA_DxE_CFG_DATA_CACHE_CTRL(WR_CACHE_3BITS);

	val |= EIP197_HIA_DxE_CFG_DATA_CACHE_CTRL(WR_CACHE_3BITS);

	val |= EIP197_HIA_DSE_CFG_ALLWAYS_BUFFERABLE;

	val |= EIP197_HIA_DSE_CFG_EN_SINGLE_WR;

	val |= EIP197_HIA_DSE_CFG_EN_SINGLE_WR;

	writel(val, priv->base + EIP197_HIA_DSE_CFG);

	writel(val, priv->base + EIP197_HIA_DSE_CFG);

drivers/crypto/inside-secure/safexcel.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -139,6 +139,7 @@ 
#define EIP197_HIA_DxE_CFG_MIN_DATA_SIZE(n)	((n) << 0)

#define EIP197_HIA_DxE_CFG_MIN_DATA_SIZE(n)	((n) << 0)

#define EIP197_HIA_DxE_CFG_DATA_CACHE_CTRL(n)	(((n) & 0x7) << 4)

#define EIP197_HIA_DxE_CFG_DATA_CACHE_CTRL(n)	(((n) & 0x7) << 4)

#define EIP197_HIA_DxE_CFG_MAX_DATA_SIZE(n)	((n) << 8)

#define EIP197_HIA_DxE_CFG_MAX_DATA_SIZE(n)	((n) << 8)

#define EIP197_HIA_DSE_CFG_ALLWAYS_BUFFERABLE	GENMASK(15, 14)

#define EIP197_HIA_DxE_CFG_MIN_CTRL_SIZE(n)	((n) << 16)

#define EIP197_HIA_DxE_CFG_MIN_CTRL_SIZE(n)	((n) << 16)

#define EIP197_HIA_DxE_CFG_CTRL_CACHE_CTRL(n)	(((n) & 0x7) << 20)

#define EIP197_HIA_DxE_CFG_CTRL_CACHE_CTRL(n)	(((n) & 0x7) << 20)

#define EIP197_HIA_DxE_CFG_MAX_CTRL_SIZE(n)	((n) << 24)

#define EIP197_HIA_DxE_CFG_MAX_CTRL_SIZE(n)	((n) << 24)