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Commit edca2d05 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/gmc9: disable legacy vga features in gmc init 



Needs to be done when the MC is set up.

Acked-by: default avatarChristian König <christian.koenig@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Reviewed-by: default avatarJunwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2e2bfd90

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+16 −0
Original line number Diff line number Diff line
@@ -29,6 +29,8 @@ 
#include "vega10/HDP/hdp_4_0_offset.h"

#include "vega10/HDP/hdp_4_0_sh_mask.h"

#include "vega10/GC/gc_9_0_sh_mask.h"

#include "vega10/DC/dce_12_0_offset.h"

#include "vega10/DC/dce_12_0_sh_mask.h"

#include "vega10/vega10_enum.h"



#include "soc15_common.h"
@@ -750,6 +752,20 @@ static int gmc_v9_0_hw_init(void *handle) 
	/* The sequence of these two function calls matters.*/

	gmc_v9_0_init_golden_registers(adev);



	if (adev->mode_info.num_crtc) {

		u32 tmp;



		/* Lockout access through VGA aperture*/

		tmp = RREG32_SOC15(DCE, 0, mmVGA_HDP_CONTROL);

		tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1);

		WREG32_SOC15(DCE, 0, mmVGA_HDP_CONTROL, tmp);



		/* disable VGA render */

		tmp = RREG32_SOC15(DCE, 0, mmVGA_RENDER_CONTROL);

		tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);

		WREG32_SOC15(DCE, 0, mmVGA_RENDER_CONTROL, tmp);

	}



	r = gmc_v9_0_gart_enable(adev);



	return r;