Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ed39097c authored by Thierry Reding's avatar Thierry Reding Committed by Stephen Warren
Browse files

ARM: tegra: Add Tegra30 host1x support



Add the host1x node along with its children to the Tegra30 DTSI. Board-
specific DTS files are expected to enable the available outputs and
complement the device tree with data specific to the hardware.

Signed-off-by: default avatarThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent ed821f07
Loading
Loading
Loading
Loading
+87 −0
Original line number Diff line number Diff line
@@ -4,6 +4,93 @@
	compatible = "nvidia,tegra30";
	interrupt-parent = <&intc>;

	host1x {
		compatible = "nvidia,tegra30-host1x", "simple-bus";
		reg = <0x50000000 0x00024000>;
		interrupts = <0 65 0x04   /* mpcore syncpt */
			      0 67 0x04>; /* mpcore general */

		#address-cells = <1>;
		#size-cells = <1>;

		ranges = <0x54000000 0x54000000 0x04000000>;

		mpe {
			compatible = "nvidia,tegra30-mpe";
			reg = <0x54040000 0x00040000>;
			interrupts = <0 68 0x04>;
		};

		vi {
			compatible = "nvidia,tegra30-vi";
			reg = <0x54080000 0x00040000>;
			interrupts = <0 69 0x04>;
		};

		epp {
			compatible = "nvidia,tegra30-epp";
			reg = <0x540c0000 0x00040000>;
			interrupts = <0 70 0x04>;
		};

		isp {
			compatible = "nvidia,tegra30-isp";
			reg = <0x54100000 0x00040000>;
			interrupts = <0 71 0x04>;
		};

		gr2d {
			compatible = "nvidia,tegra30-gr2d";
			reg = <0x54140000 0x00040000>;
			interrupts = <0 72 0x04>;
		};

		gr3d {
			compatible = "nvidia,tegra30-gr3d";
			reg = <0x54180000 0x00040000>;
		};

		dc@54200000 {
			compatible = "nvidia,tegra30-dc";
			reg = <0x54200000 0x00040000>;
			interrupts = <0 73 0x04>;

			rgb {
				status = "disabled";
			};
		};

		dc@54240000 {
			compatible = "nvidia,tegra30-dc";
			reg = <0x54240000 0x00040000>;
			interrupts = <0 74 0x04>;

			rgb {
				status = "disabled";
			};
		};

		hdmi {
			compatible = "nvidia,tegra30-hdmi";
			reg = <0x54280000 0x00040000>;
			interrupts = <0 75 0x04>;
			status = "disabled";
		};

		tvo {
			compatible = "nvidia,tegra30-tvo";
			reg = <0x542c0000 0x00040000>;
			interrupts = <0 76 0x04>;
			status = "disabled";
		};

		dsi {
			compatible = "nvidia,tegra30-dsi";
			reg = <0x54300000 0x00040000>;
			status = "disabled";
		};
	};

	cache-controller@50043000 {
		compatible = "arm,pl310-cache";
		reg = <0x50043000 0x1000>;