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Commit ed1c7de2 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

ARM: OMAP2+: Move iommu2 to drivers/iommu/omap-iommu2.c 



This file should not be in arch/arm. Move it to drivers/iommu
to allow making most of the header local to drivers/iommu.

This is needed as we are removing plat and mach includes
from drivers for ARM common zImage support.

Cc: Ido Yariv <ido@wizery.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Mauro Carvalho Chehab <mchehab@infradead.org>
Cc: Omar Ramirez Luna <omar.luna@linaro.org>
Cc: linux-media@vger.kernel.org
Acked-by: default avatarOhad Ben-Cohen <ohad@wizery.com>
Acked-by: default avatarJoerg Roedel <joro@8bytes.org>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent c8d35c84

arch/arm/mach-omap2/Makefile

+0 −2
Original line number Diff line number Diff line
@@ -184,8 +184,6 @@ obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o 
obj-$(CONFIG_OMAP_MBOX_FWK)		+= mailbox_mach.o

mailbox_mach-objs			:= mailbox.o



obj-$(CONFIG_OMAP_IOMMU)		+= iommu2.o



iommu-$(CONFIG_OMAP_IOMMU)		:= omap-iommu.o

obj-y					+= $(iommu-m) $(iommu-y)

arch/arm/plat-omap/include/plat/iommu.h

+14 −258
Original line number Diff line number Diff line
@@ -10,103 +10,21 @@ 
 * published by the Free Software Foundation.

 */



#ifndef __MACH_IOMMU_H

#define __MACH_IOMMU_H



#include <linux/io.h>



#if defined(CONFIG_ARCH_OMAP1)

#error "iommu for this processor not implemented yet"

#endif



struct iotlb_entry {

	u32 da;

	u32 pa;

	u32 pgsz, prsvd, valid;

	union {

		u16 ap;

		struct {

			u32 endian, elsz, mixed;

		};

	};

};



struct omap_iommu {

	const char	*name;

	struct module	*owner;

	struct clk	*clk;

	void __iomem	*regbase;

	struct device	*dev;

	void		*isr_priv;

	struct iommu_domain *domain;



	unsigned int	refcount;

	spinlock_t	iommu_lock;	/* global for this whole object */

#define MMU_REG_SIZE		256



	/*

	 * We don't change iopgd for a situation like pgd for a task,

	 * but share it globally for each iommu.

/**

 * struct iommu_arch_data - omap iommu private data

 * @name: name of the iommu device

 * @iommu_dev: handle of the iommu device

 *

 * This is an omap iommu private data object, which binds an iommu user

 * to its iommu device. This object should be placed at the iommu user's

 * dev_archdata so generic IOMMU API can be used without having to

 * utilize omap-specific plumbing anymore.

 */

	u32		*iopgd;

	spinlock_t	page_table_lock; /* protect iopgd */



	int		nr_tlb_entries;



	struct list_head	mmap;

	struct mutex		mmap_lock; /* protect mmap */



	void *ctx; /* iommu context: registres saved area */

	u32 da_start;

	u32 da_end;

};



struct cr_regs {

	union {

		struct {

			u16 cam_l;

			u16 cam_h;

		};

		u32 cam;

	};

	union {

		struct {

			u16 ram_l;

			u16 ram_h;

		};

		u32 ram;

	};

};



struct iotlb_lock {

	short base;

	short vict;

};



/* architecture specific functions */

struct iommu_functions {

	unsigned long	version;



	int (*enable)(struct omap_iommu *obj);

	void (*disable)(struct omap_iommu *obj);

	void (*set_twl)(struct omap_iommu *obj, bool on);

	u32 (*fault_isr)(struct omap_iommu *obj, u32 *ra);



	void (*tlb_read_cr)(struct omap_iommu *obj, struct cr_regs *cr);

	void (*tlb_load_cr)(struct omap_iommu *obj, struct cr_regs *cr);



	struct cr_regs *(*alloc_cr)(struct omap_iommu *obj,

							struct iotlb_entry *e);

	int (*cr_valid)(struct cr_regs *cr);

	u32 (*cr_to_virt)(struct cr_regs *cr);

	void (*cr_to_e)(struct cr_regs *cr, struct iotlb_entry *e);

	ssize_t (*dump_cr)(struct omap_iommu *obj, struct cr_regs *cr,

							char *buf);



	u32 (*get_pte_attr)(struct iotlb_entry *e);



	void (*save_ctx)(struct omap_iommu *obj);

	void (*restore_ctx)(struct omap_iommu *obj);

	ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len);

struct omap_iommu_arch_data {

	const char *name;

	struct omap_iommu *iommu_dev;

};



/**
@@ -129,165 +47,3 @@ struct iommu_platform_data { 
	u32 da_start;

	u32 da_end;

};
 


/**

 * struct iommu_arch_data - omap iommu private data

 * @name: name of the iommu device

 * @iommu_dev: handle of the iommu device

 *

 * This is an omap iommu private data object, which binds an iommu user

 * to its iommu device. This object should be placed at the iommu user's

 * dev_archdata so generic IOMMU API can be used without having to

 * utilize omap-specific plumbing anymore.

 */

struct omap_iommu_arch_data {

	const char *name;

	struct omap_iommu *iommu_dev;

};



#ifdef CONFIG_IOMMU_API

/**

 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device

 * @dev: iommu client device

 */

static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)

{

	struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;



	return arch_data->iommu_dev;

}

#endif



/* IOMMU errors */

#define OMAP_IOMMU_ERR_TLB_MISS		(1 << 0)

#define OMAP_IOMMU_ERR_TRANS_FAULT	(1 << 1)

#define OMAP_IOMMU_ERR_EMU_MISS		(1 << 2)

#define OMAP_IOMMU_ERR_TBLWALK_FAULT	(1 << 3)

#define OMAP_IOMMU_ERR_MULTIHIT_FAULT	(1 << 4)



/*

 * MMU Register offsets

 */

#define MMU_REVISION		0x00

#define MMU_SYSCONFIG		0x10

#define MMU_SYSSTATUS		0x14

#define MMU_IRQSTATUS		0x18

#define MMU_IRQENABLE		0x1c

#define MMU_WALKING_ST		0x40

#define MMU_CNTL		0x44

#define MMU_FAULT_AD		0x48

#define MMU_TTB			0x4c

#define MMU_LOCK		0x50

#define MMU_LD_TLB		0x54

#define MMU_CAM			0x58

#define MMU_RAM			0x5c

#define MMU_GFLUSH		0x60

#define MMU_FLUSH_ENTRY		0x64

#define MMU_READ_CAM		0x68

#define MMU_READ_RAM		0x6c

#define MMU_EMU_FAULT_AD	0x70



#define MMU_REG_SIZE		256



/*

 * MMU Register bit definitions

 */

#define MMU_LOCK_BASE_SHIFT	10

#define MMU_LOCK_BASE_MASK	(0x1f << MMU_LOCK_BASE_SHIFT)

#define MMU_LOCK_BASE(x)	\

	((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)



#define MMU_LOCK_VICT_SHIFT	4

#define MMU_LOCK_VICT_MASK	(0x1f << MMU_LOCK_VICT_SHIFT)

#define MMU_LOCK_VICT(x)	\

	((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)



#define MMU_CAM_VATAG_SHIFT	12

#define MMU_CAM_VATAG_MASK \

	((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)

#define MMU_CAM_P		(1 << 3)

#define MMU_CAM_V		(1 << 2)

#define MMU_CAM_PGSZ_MASK	3

#define MMU_CAM_PGSZ_1M		(0 << 0)

#define MMU_CAM_PGSZ_64K	(1 << 0)

#define MMU_CAM_PGSZ_4K		(2 << 0)

#define MMU_CAM_PGSZ_16M	(3 << 0)



#define MMU_RAM_PADDR_SHIFT	12

#define MMU_RAM_PADDR_MASK \

	((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)



#define MMU_RAM_ENDIAN_MASK	(1 << MMU_RAM_ENDIAN_SHIFT)

#define MMU_RAM_ELSZ_MASK	(3 << MMU_RAM_ELSZ_SHIFT)



#define MMU_RAM_ELSZ_16		(1 << MMU_RAM_ELSZ_SHIFT)

#define MMU_RAM_ELSZ_32		(2 << MMU_RAM_ELSZ_SHIFT)

#define MMU_RAM_ELSZ_NONE	(3 << MMU_RAM_ELSZ_SHIFT)

#define MMU_RAM_MIXED_SHIFT	6

#define MMU_RAM_MIXED_MASK	(1 << MMU_RAM_MIXED_SHIFT)

#define MMU_RAM_MIXED		MMU_RAM_MIXED_MASK



/*

 * utilities for super page(16MB, 1MB, 64KB and 4KB)

 */



#define iopgsz_max(bytes)			\

	(((bytes) >= SZ_16M) ? SZ_16M :		\

	 ((bytes) >= SZ_1M)  ? SZ_1M  :		\

	 ((bytes) >= SZ_64K) ? SZ_64K :		\

	 ((bytes) >= SZ_4K)  ? SZ_4K  :	0)



#define bytes_to_iopgsz(bytes)				\

	(((bytes) == SZ_16M) ? MMU_CAM_PGSZ_16M :	\

	 ((bytes) == SZ_1M)  ? MMU_CAM_PGSZ_1M  :	\

	 ((bytes) == SZ_64K) ? MMU_CAM_PGSZ_64K :	\

	 ((bytes) == SZ_4K)  ? MMU_CAM_PGSZ_4K  : -1)



#define iopgsz_to_bytes(iopgsz)				\

	(((iopgsz) == MMU_CAM_PGSZ_16M)	? SZ_16M :	\

	 ((iopgsz) == MMU_CAM_PGSZ_1M)	? SZ_1M  :	\

	 ((iopgsz) == MMU_CAM_PGSZ_64K)	? SZ_64K :	\

	 ((iopgsz) == MMU_CAM_PGSZ_4K)	? SZ_4K  : 0)



#define iopgsz_ok(bytes) (bytes_to_iopgsz(bytes) >= 0)



/*

 * global functions

 */

extern u32 omap_iommu_arch_version(void);



extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e);



extern int

omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e);



extern int omap_iommu_set_isr(const char *name,

		 int (*isr)(struct omap_iommu *obj, u32 da, u32 iommu_errs,

				    void *priv),

			 void *isr_priv);



extern int omap_install_iommu_arch(const struct iommu_functions *ops);

extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);



extern int omap_foreach_iommu_device(void *data,

				int (*fn)(struct device *, void *));



extern ssize_t

omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);

extern size_t

omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len);



/*

 * register accessors

 */

static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs)

{

	return __raw_readl(obj->regbase + offs);

}



static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs)

{

	__raw_writel(val, obj->regbase + offs);

}



#endif /* __MACH_IOMMU_H */

drivers/iommu/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ obj-$(CONFIG_DMAR_TABLE) += dmar.o 
obj-$(CONFIG_INTEL_IOMMU) += iova.o intel-iommu.o

obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o

obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o

obj-$(CONFIG_OMAP_IOMMU) += omap-iommu2.o

obj-$(CONFIG_OMAP_IOVMM) += omap-iovmm.o

obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o

obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o

drivers/iommu/omap-iommu-debug.c

+1 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include <plat/iommu.h>



#include "omap-iopgtable.h"

#include "omap-iommu.h"



#define MAXCOLUMN 100 /* for short messages */

drivers/iommu/omap-iommu.c

+19 −0
Original line number Diff line number Diff line
@@ -22,12 +22,14 @@ 
#include <linux/omap-iommu.h>

#include <linux/mutex.h>

#include <linux/spinlock.h>

#include <linux/io.h>



#include <asm/cacheflush.h>



#include <plat/iommu.h>



#include "omap-iopgtable.h"

#include "omap-iommu.h"



#define for_each_iotlb_cr(obj, n, __i, cr)				\

	for (__i = 0;							\
@@ -1016,6 +1018,23 @@ static void iopte_cachep_ctor(void *iopte) 
	clean_dcache_area(iopte, IOPTE_TABLE_SIZE);

}



static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,

				   u32 flags)

{

	memset(e, 0, sizeof(*e));



	e->da		= da;

	e->pa		= pa;

	e->valid	= 1;

	/* FIXME: add OMAP1 support */

	e->pgsz		= flags & MMU_CAM_PGSZ_MASK;

	e->endian	= flags & MMU_RAM_ENDIAN_MASK;

	e->elsz		= flags & MMU_RAM_ELSZ_MASK;

	e->mixed	= flags & MMU_RAM_MIXED_MASK;



	return iopgsz_to_bytes(e->pgsz);

}



static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,

			 phys_addr_t pa, size_t bytes, int prot)

{