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Commit ed1bd46b authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'omap-for-v3.20/dm816x-data' of... 

Merge tag 'omap-for-v3.20/dm816x-data' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Merge "omap changes to make dm816x usable" from Tony Lindgren:

Patches to add necessary SoC related clockdomain and interconnect
data  to make dm816x boot with basic devices. This finally gets
dm816x into a usable shape for further work to happen after a few
years of stalled effort of making this SoC to work with the mainline
kernel.

As most of the devices are similar to the other omap variants, we
get at least serial, MMC, Ethernet, I2C, EDMA, pinctrl, SPI and GPMC
working for these SoCs with the related device tree changes.

* tag 'omap-for-v3.20/dm816x-data' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  ARM: OMAP2+: Add dm816x hwmod support
  ARM: OMAP2+: Add clock domain support for dm816x
  ARM: OMAP2+: Add board-generic.c entry for ti81xx
  ARM: OMAP2+: Disable omap3 PM init for ti81xx
  ARM: OMAP2+: Fix reboot for 81xx
  ARM: OMAP2+: Fix dm814 and dm816 for clocks and timer init
  ARM: OMAP2+: Fix ti81xx class type
  ARM: OMAP2+: Fix ti81xx devtype
  ARM: OMAP2+: Fix error handling for omap2_clk_enable_init_clocks

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 688a4994 4d38bd12

arch/arm/mach-omap2/Makefile

+5 −0
Original line number Diff line number Diff line
@@ -58,6 +58,7 @@ AFLAGS_sram34xx.o :=-Wa,-march=armv7-a 
# Restart code (OMAP4/5 currently in omap4-common.c)

obj-$(CONFIG_SOC_OMAP2420)		+= omap2-restart.o

obj-$(CONFIG_SOC_OMAP2430)		+= omap2-restart.o

obj-$(CONFIG_SOC_TI81XX)		+= ti81xx-restart.o

obj-$(CONFIG_SOC_AM33XX)		+= am33xx-restart.o

obj-$(CONFIG_SOC_AM43XX)		+= omap4-restart.o

obj-$(CONFIG_ARCH_OMAP3)		+= omap3-restart.o
@@ -120,6 +121,7 @@ obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common) 
obj-$(CONFIG_SOC_OMAP5)			+= $(omap-prcm-4-5-common)

obj-$(CONFIG_SOC_DRA7XX)		+= $(omap-prcm-4-5-common)

am33xx-43xx-prcm-common			+= prm33xx.o cm33xx.o

obj-$(CONFIG_SOC_TI81XX)		+= $(am33xx-43xx-prcm-common)

obj-$(CONFIG_SOC_AM33XX)		+= $(am33xx-43xx-prcm-common)

obj-$(CONFIG_SOC_AM43XX)		+= $(omap-prcm-4-5-common) \

					   $(am33xx-43xx-prcm-common)
@@ -170,6 +172,8 @@ obj-$(CONFIG_ARCH_OMAP4) += $(clockdomain-common) 
obj-$(CONFIG_ARCH_OMAP4)		+= clockdomains44xx_data.o

obj-$(CONFIG_SOC_AM33XX)		+= $(clockdomain-common)

obj-$(CONFIG_SOC_AM33XX)		+= clockdomains33xx_data.o

obj-$(CONFIG_SOC_TI81XX)		+= $(clockdomain-common)

obj-$(CONFIG_SOC_TI81XX)		+= clockdomains81xx_data.o

obj-$(CONFIG_SOC_AM43XX)		+= $(clockdomain-common)

obj-$(CONFIG_SOC_AM43XX)		+= clockdomains43xx_data.o

obj-$(CONFIG_SOC_OMAP5)			+= $(clockdomain-common)
@@ -223,6 +227,7 @@ obj-$(CONFIG_SOC_AM33XX) += omap_hwmod_33xx_43xx_ipblock_data.o 
obj-$(CONFIG_SOC_AM43XX)		+= omap_hwmod_43xx_data.o

obj-$(CONFIG_SOC_AM43XX)		+= omap_hwmod_33xx_43xx_interconnect_data.o

obj-$(CONFIG_SOC_AM43XX)		+= omap_hwmod_33xx_43xx_ipblock_data.o

obj-$(CONFIG_SOC_TI81XX)		+= omap_hwmod_81xx_data.o

obj-$(CONFIG_ARCH_OMAP4)		+= omap_hwmod_44xx_data.o

obj-$(CONFIG_SOC_OMAP5)			+= omap_hwmod_54xx_data.o

obj-$(CONFIG_SOC_DRA7XX)		+= omap_hwmod_7xx_data.o

arch/arm/mach-omap2/board-generic.c

+36 −0
Original line number Diff line number Diff line
@@ -144,6 +144,42 @@ DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)") 
MACHINE_END

#endif



#ifdef CONFIG_SOC_TI81XX

static const char *const ti814x_boards_compat[] __initconst = {

	"ti,dm8148",

	"ti,dm814",

	NULL,

};



DT_MACHINE_START(TI81XX_DT, "Generic ti814x (Flattened Device Tree)")

	.reserve	= omap_reserve,

	.map_io		= ti81xx_map_io,

	.init_early	= ti814x_init_early,

	.init_machine	= omap_generic_init,

	.init_late	= ti81xx_init_late,

	.init_time	= omap3_gptimer_timer_init,

	.dt_compat	= ti814x_boards_compat,

	.restart	= ti81xx_restart,

MACHINE_END



static const char *const ti816x_boards_compat[] __initconst = {

	"ti,dm8168",

	"ti,dm816",

	NULL,

};



DT_MACHINE_START(TI816X_DT, "Generic ti816x (Flattened Device Tree)")

	.reserve	= omap_reserve,

	.map_io		= ti81xx_map_io,

	.init_early	= ti816x_init_early,

	.init_machine	= omap_generic_init,

	.init_late	= ti81xx_init_late,

	.init_time	= omap3_gptimer_timer_init,

	.dt_compat	= ti816x_boards_compat,

	.restart	= ti81xx_restart,

MACHINE_END

#endif



#ifdef CONFIG_SOC_AM33XX

static const char *const am33xx_boards_compat[] __initconst = {

	"ti,am33xx",

arch/arm/mach-omap2/clock.c

+3 −0
Original line number Diff line number Diff line
@@ -620,6 +620,9 @@ void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks) 


	for (i = 0; i < num_clocks; i++) {

		init_clk = clk_get(NULL, clk_names[i]);

		if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",

				clk_names[i]))

			continue;

		clk_prepare_enable(init_clk);

	}

}

arch/arm/mach-omap2/clockdomain.h

+1 −0
Original line number Diff line number Diff line
@@ -216,6 +216,7 @@ extern void __init omap242x_clockdomains_init(void); 
extern void __init omap243x_clockdomains_init(void);

extern void __init omap3xxx_clockdomains_init(void);

extern void __init am33xx_clockdomains_init(void);

extern void __init ti81xx_clockdomains_init(void);

extern void __init omap44xx_clockdomains_init(void);

extern void __init omap54xx_clockdomains_init(void);

extern void __init dra7xx_clockdomains_init(void);

arch/arm/mach-omap2/clockdomains81xx_data.c

0 → 100644
+194 −0
Original line number Diff line number Diff line 
/*

 * TI81XX Clock Domain data.

 *

 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/

 * Copyright (C) 2013 SKTB SKiT, http://www.skitlab.ru/

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License as

 * published by the Free Software Foundation version 2.

 *

 * This program is distributed "as is" WITHOUT ANY WARRANTY of any

 * kind, whether express or implied; without even the implied warranty

 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_81XX_H

#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_81XX_H



#include <linux/kernel.h>

#include <linux/io.h>



#include "clockdomain.h"

#include "cm81xx.h"



/*

 * Note that 814x seems to have HWSUP_SWSUP for many clockdomains

 * while 816x does not. According to the TRM, 816x only has HWSUP

 * for ALWON_L3_FAST. Also note that the TI tree clockdomains81xx.h

 * seems to have the related ifdef the wrong way around claiming

 * 816x supports HWSUP while 814x does not. For now, we only set

 * HWSUP for ALWON_L3_FAST as that seems to be supported for both

 * dm814x and dm816x.

 */



/* Common for 81xx */



static struct clockdomain alwon_l3_slow_81xx_clkdm = {

	.name		= "alwon_l3s_clkdm",

	.pwrdm		= { .name = "alwon_pwrdm" },

	.cm_inst	= TI81XX_CM_ALWON_MOD,

	.clkdm_offs	= TI81XX_CM_ALWON_L3_SLOW_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain alwon_l3_med_81xx_clkdm = {

	.name		= "alwon_l3_med_clkdm",

	.pwrdm		= { .name = "alwon_pwrdm" },

	.cm_inst	= TI81XX_CM_ALWON_MOD,

	.clkdm_offs	= TI81XX_CM_ALWON_L3_MED_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain alwon_l3_fast_81xx_clkdm = {

	.name		= "alwon_l3_fast_clkdm",

	.pwrdm		= { .name = "alwon_pwrdm" },

	.cm_inst	= TI81XX_CM_ALWON_MOD,

	.clkdm_offs	= TI81XX_CM_ALWON_L3_FAST_CLKDM,

	.flags		= CLKDM_CAN_HWSUP_SWSUP,

};



static struct clockdomain alwon_ethernet_81xx_clkdm = {

	.name		= "alwon_ethernet_clkdm",

	.pwrdm		= { .name = "alwon_pwrdm" },

	.cm_inst	= TI81XX_CM_ALWON_MOD,

	.clkdm_offs	= TI81XX_CM_ETHERNET_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain mmu_81xx_clkdm = {

	.name		= "mmu_clkdm",

	.pwrdm		= { .name = "alwon_pwrdm" },

	.cm_inst	= TI81XX_CM_ALWON_MOD,

	.clkdm_offs	= TI81XX_CM_MMU_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain mmu_cfg_81xx_clkdm = {

	.name		= "mmu_cfg_clkdm",

	.pwrdm		= { .name = "alwon_pwrdm" },

	.cm_inst	= TI81XX_CM_ALWON_MOD,

	.clkdm_offs	= TI81XX_CM_MMUCFG_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



/* 816x only */



static struct clockdomain alwon_mpu_816x_clkdm = {

	.name		= "alwon_mpu_clkdm",

	.pwrdm		= { .name = "alwon_pwrdm" },

	.cm_inst	= TI81XX_CM_ALWON_MOD,

	.clkdm_offs	= TI81XX_CM_ALWON_MPU_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain active_gem_816x_clkdm = {

	.name		= "active_gem_clkdm",

	.pwrdm		= { .name = "active_pwrdm" },

	.cm_inst	= TI816X_CM_ACTIVE_MOD,

	.clkdm_offs	= TI816X_CM_ACTIVE_GEM_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain ivahd0_816x_clkdm = {

	.name		= "ivahd0_clkdm",

	.pwrdm		= { .name = "ivahd0_pwrdm" },

	.cm_inst	= TI816X_CM_IVAHD0_MOD,

	.clkdm_offs	= TI816X_CM_IVAHD0_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain ivahd1_816x_clkdm = {

	.name		= "ivahd1_clkdm",

	.pwrdm		= { .name = "ivahd1_pwrdm" },

	.cm_inst	= TI816X_CM_IVAHD1_MOD,

	.clkdm_offs	= TI816X_CM_IVAHD1_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain ivahd2_816x_clkdm = {

	.name		= "ivahd2_clkdm",

	.pwrdm		= { .name = "ivahd2_pwrdm" },

	.cm_inst	= TI816X_CM_IVAHD2_MOD,

	.clkdm_offs	= TI816X_CM_IVAHD2_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain sgx_816x_clkdm = {

	.name		= "sgx_clkdm",

	.pwrdm		= { .name = "sgx_pwrdm" },

	.cm_inst	= TI816X_CM_SGX_MOD,

	.clkdm_offs	= TI816X_CM_SGX_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain default_l3_med_816x_clkdm = {

	.name		= "default_l3_med_clkdm",

	.pwrdm		= { .name = "default_pwrdm" },

	.cm_inst	= TI816X_CM_DEFAULT_MOD,

	.clkdm_offs	= TI816X_CM_DEFAULT_L3_MED_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain default_ducati_816x_clkdm = {

	.name		= "default_ducati_clkdm",

	.pwrdm		= { .name = "default_pwrdm" },

	.cm_inst	= TI816X_CM_DEFAULT_MOD,

	.clkdm_offs	= TI816X_CM_DEFAULT_DUCATI_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain default_pci_816x_clkdm = {

	.name		= "default_pci_clkdm",

	.pwrdm		= { .name = "default_pwrdm" },

	.cm_inst	= TI816X_CM_DEFAULT_MOD,

	.clkdm_offs	= TI816X_CM_DEFAULT_PCI_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain default_l3_slow_816x_clkdm = {

	.name		= "default_l3_slow_clkdm",

	.pwrdm		= { .name = "default_pwrdm" },

	.cm_inst	= TI816X_CM_DEFAULT_MOD,

	.clkdm_offs	= TI816X_CM_DEFAULT_L3_SLOW_CLKDM,

	.flags		= CLKDM_CAN_SWSUP,

};



static struct clockdomain *clockdomains_ti81xx[] __initdata = {

	&alwon_mpu_816x_clkdm,

	&alwon_l3_slow_81xx_clkdm,

	&alwon_l3_med_81xx_clkdm,

	&alwon_l3_fast_81xx_clkdm,

	&alwon_ethernet_81xx_clkdm,

	&mmu_81xx_clkdm,

	&mmu_cfg_81xx_clkdm,

	&active_gem_816x_clkdm,

	&ivahd0_816x_clkdm,

	&ivahd1_816x_clkdm,

	&ivahd2_816x_clkdm,

	&sgx_816x_clkdm,

	&default_l3_med_816x_clkdm,

	&default_ducati_816x_clkdm,

	&default_pci_816x_clkdm,

	&default_l3_slow_816x_clkdm,

	NULL,

};



void __init ti81xx_clockdomains_init(void)

{

	clkdm_register_platform_funcs(&am33xx_clkdm_operations);

	clkdm_register_clkdms(clockdomains_ti81xx);

	clkdm_complete_init();

}

#endif