bcma: add SOC bus (ecd177c2) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/bcma/Kconfig

+4 −0

Original line number	Diff line number	Diff line
		@@ -33,6 +33,10 @@ config BCMA_DRIVER_PCI_HOSTMODE
		help
		PCI core hostmode operation (external PCI bus).

		config BCMA_HOST_SOC
		bool
		depends on BCMA && MIPS

		config BCMA_DEBUG
		bool "BCMA debugging"
		depends on BCMA

drivers/bcma/Makefile

+1 −0

Original line number	Diff line number	Diff line
		@@ -3,6 +3,7 @@ bcma-y += driver_chipcommon.o driver_chipcommon_pmu.o
		bcma-y += driver_pci.o
		bcma-$(CONFIG_BCMA_DRIVER_PCI_HOSTMODE) += driver_pci_host.o
		bcma-$(CONFIG_BCMA_HOST_PCI) += host_pci.o
		bcma-$(CONFIG_BCMA_HOST_SOC) += host_soc.o
		obj-$(CONFIG_BCMA) += bcma.o

		ccflags-$(CONFIG_BCMA_DEBUG) := -DDEBUG

drivers/bcma/core.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -110,6 +110,8 @@ EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);
		u32 bcma_core_dma_translation(struct bcma_device *core)
		{
		switch (core->bus->hosttype) {
		case BCMA_HOSTTYPE_SOC:
		return 0;
		case BCMA_HOSTTYPE_PCI:
		if (bcma_aread32(core, BCMA_IOST) & BCMA_IOST_DMA64)
		return BCMA_DMA_TRANSLATION_DMA64_CMT;

drivers/bcma/driver_pci.c

+8 −1

Original line number	Diff line number	Diff line
		@@ -210,7 +210,14 @@ int bcma_core_pci_irq_ctl(struct bcma_drv_pci pc, struct bcma_device core,
		{
		struct pci_dev *pdev = pc->core->bus->host_pci;
		u32 coremask, tmp;
		int err;
		int err = 0;

		if (core->bus->hosttype != BCMA_HOSTTYPE_PCI) {
		/* This bcma device is not on a PCI host-bus. So the IRQs are
		* not routed through the PCI core.
		* So we must not enable routing through the PCI core. */
		goto out;
		}

		err = pci_read_config_dword(pdev, BCMA_PCI_IRQMASK, &tmp);
		if (err)

drivers/bcma/host_soc.c

0 → 100644

+183 −0

Original line number	Diff line number	Diff line
		/*
		* Broadcom specific AMBA
		* System on Chip (SoC) Host
		*
		* Licensed under the GNU/GPL. See COPYING for details.
		*/

		#include "bcma_private.h"
		#include "scan.h"
		#include <linux/bcma/bcma.h>
		#include <linux/bcma/bcma_soc.h>

		static u8 bcma_host_soc_read8(struct bcma_device *core, u16 offset)
		{
		return readb(core->io_addr + offset);
		}

		static u16 bcma_host_soc_read16(struct bcma_device *core, u16 offset)
		{
		return readw(core->io_addr + offset);
		}

		static u32 bcma_host_soc_read32(struct bcma_device *core, u16 offset)
		{
		return readl(core->io_addr + offset);
		}

		static void bcma_host_soc_write8(struct bcma_device *core, u16 offset,
		u8 value)
		{
		writeb(value, core->io_addr + offset);
		}

		static void bcma_host_soc_write16(struct bcma_device *core, u16 offset,
		u16 value)
		{
		writew(value, core->io_addr + offset);
		}

		static void bcma_host_soc_write32(struct bcma_device *core, u16 offset,
		u32 value)
		{
		writel(value, core->io_addr + offset);
		}

		#ifdef CONFIG_BCMA_BLOCKIO
		static void bcma_host_soc_block_read(struct bcma_device core, void buffer,
		size_t count, u16 offset, u8 reg_width)
		{
		void __iomem *addr = core->io_addr + offset;

		switch (reg_width) {
		case sizeof(u8): {
		u8 *buf = buffer;

		while (count) {
		*buf = __raw_readb(addr);
		buf++;
		count--;
		}
		break;
		}
		case sizeof(u16): {
		__le16 *buf = buffer;

		WARN_ON(count & 1);
		while (count) {
		*buf = (__force __le16)__raw_readw(addr);
		buf++;
		count -= 2;
		}
		break;
		}
		case sizeof(u32): {
		__le32 *buf = buffer;

		WARN_ON(count & 3);
		while (count) {
		*buf = (__force __le32)__raw_readl(addr);
		buf++;
		count -= 4;
		}
		break;
		}
		default:
		WARN_ON(1);
		}
		}

		static void bcma_host_soc_block_write(struct bcma_device *core,
		const void *buffer,
		size_t count, u16 offset, u8 reg_width)
		{
		void __iomem *addr = core->io_addr + offset;

		switch (reg_width) {
		case sizeof(u8): {
		const u8 *buf = buffer;

		while (count) {
		__raw_writeb(*buf, addr);
		buf++;
		count--;
		}
		break;
		}
		case sizeof(u16): {
		const __le16 *buf = buffer;

		WARN_ON(count & 1);
		while (count) {
		__raw_writew((__force u16)(*buf), addr);
		buf++;
		count -= 2;
		}
		break;
		}
		case sizeof(u32): {
		const __le32 *buf = buffer;

		WARN_ON(count & 3);
		while (count) {
		__raw_writel((__force u32)(*buf), addr);
		buf++;
		count -= 4;
		}
		break;
		}
		default:
		WARN_ON(1);
		}
		}
		#endif /* CONFIG_BCMA_BLOCKIO */

		static u32 bcma_host_soc_aread32(struct bcma_device *core, u16 offset)
		{
		return readl(core->io_wrap + offset);
		}

		static void bcma_host_soc_awrite32(struct bcma_device *core, u16 offset,
		u32 value)
		{
		writel(value, core->io_wrap + offset);
		}

		const struct bcma_host_ops bcma_host_soc_ops = {
		.read8 = bcma_host_soc_read8,
		.read16 = bcma_host_soc_read16,
		.read32 = bcma_host_soc_read32,
		.write8 = bcma_host_soc_write8,
		.write16 = bcma_host_soc_write16,
		.write32 = bcma_host_soc_write32,
		#ifdef CONFIG_BCMA_BLOCKIO
		.block_read = bcma_host_soc_block_read,
		.block_write = bcma_host_soc_block_write,
		#endif
		.aread32 = bcma_host_soc_aread32,
		.awrite32 = bcma_host_soc_awrite32,
		};

		int __init bcma_host_soc_register(struct bcma_soc *soc)
		{
		struct bcma_bus *bus = &soc->bus;
		int err;

		/* iomap only first core. We have to read some register on this core
		* to scan the bus.
		*/
		bus->mmio = ioremap_nocache(BCMA_ADDR_BASE, BCMA_CORE_SIZE * 1);
		if (!bus->mmio)
		return -ENOMEM;

		/* Host specific */
		bus->hosttype = BCMA_HOSTTYPE_SOC;
		bus->ops = &bcma_host_soc_ops;

		/* Register */
		err = bcma_bus_early_register(bus, &soc->core_cc, &soc->core_mips);
		if (err)
		iounmap(bus->mmio);

		return err;
		}