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Commit ecd12af3 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: enable display rscc for lagoon target"

parents e4b0cbb3 1fc9d19e
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+1 −1
Original line number Diff line number Diff line
@@ -193,7 +193,7 @@
};

&mdss_mdp {
	connectors = <&sde_wb &sde_dsi &sde_dp>;
	connectors = <&sde_wb &sde_dsi &sde_rscc &sde_dp>;
};

&dsi_rm69299_visionox_amoled_video {
+0 −17
Original line number Diff line number Diff line
@@ -27,8 +27,6 @@
		clock-max-rate = <0 0 0 560000000 19200000 560000000>;
		qcom,dss-cx-ipeak = <&cx_ipeak_lm 4>;

		sde-vdd-supply = <&mdss_core_gdsc>;

		/* interrupt config */
		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-controller;
@@ -213,20 +211,6 @@
			qcom,sde-dspp-dither = <0x82c 0x00010007>;
		};

		qcom,platform-supply-entries {
			#address-cells = <1>;
			#size-cells = <0>;

			qcom,platform-supply-entry@0 {
				reg = <0>;
				qcom,supply-name = "sde-vdd";
				qcom,supply-min-voltage = <0>;
				qcom,supply-max-voltage = <0>;
				qcom,supply-enable-load = <0>;
				qcom,supply-disable-load = <0>;
			};
		};

		smmu_sde_unsec: qcom,smmu_sde_unsec_cb {
			compatible = "qcom,smmu_sde_unsec";
			iommus = <&apps_smmu 0x800 0x2>;
@@ -304,7 +288,6 @@
	sde_rscc: qcom,sde_rscc {
		cell-index = <0>;
		compatible = "qcom,sde-rsc";
		status = "disabled";
		reg = <0xaf20000 0x3c50>,
			<0xaf30000 0x3fd4>;
		reg-names = "drv", "wrapper";
+5 −2
Original line number Diff line number Diff line
@@ -946,12 +946,15 @@
				  <SLEEP_TCS   1>,
				  <WAKE_TCS    1>,
				  <CONTROL_TCS 0>;
		status = "disabled";

		msm_bus_disp_rsc {
			compatible = "qcom,msm-bus-rsc";
			qcom,msm-bus-id = <MSM_BUS_RSC_DISP>;
			status = "disabled";
		};

		sde_rsc_rpmh {
			compatible = "qcom,sde-rsc-rpmh";
			cell-index = <0>;
		};
	};