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Commit ecafea8c authored by Phil Edworthy's avatar Phil Edworthy Committed by Simon Horman
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ARM: shmobile: r8a7790: Add PCIEC clock device tree node 



This patch adds the device tree clock node for the PCIe Controller

Signed-off-by: default avatarPhil Edworthy <phil.edworthy@renesas.com>
Acked-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent ee914152

arch/arm/boot/dts/r8a7790.dtsi

+3 −3
Original line number Original line Diff line number Diff line
@@ -765,17 +765,17 @@ 
			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;

			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;

			clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,

			clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,

				 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,

				 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,

				 <&hp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>;

				 <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>;

			#clock-cells = <1>;

			#clock-cells = <1>;

			renesas,clock-indices = <

			renesas,clock-indices = <

				R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3

				R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3

				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0

				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0

				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1

				R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1

			>;

			>;

			clock-output-names =

			clock-output-names =

				"iic2", "tpu0", "mmcif1", "sdhi3",

				"iic2", "tpu0", "mmcif1", "sdhi3",

				"sdhi2", "sdhi1", "sdhi0", "mmcif0",

				"sdhi2", "sdhi1", "sdhi0", "mmcif0",

				"iic0", "iic1", "ssusb", "cmt1";

				"iic0", "pciec", "iic1", "ssusb", "cmt1";

		};

		};

		mstp5_clks: mstp5_clks@e6150144 {

		mstp5_clks: mstp5_clks@e6150144 {

			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";

			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";

include/dt-bindings/clock/r8a7790-clock.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -59,6 +59,7 @@ 
#define R8A7790_CLK_SDHI0		14

#define R8A7790_CLK_SDHI0		14

#define R8A7790_CLK_MMCIF0		15

#define R8A7790_CLK_MMCIF0		15

#define R8A7790_CLK_IIC0		18

#define R8A7790_CLK_IIC0		18

#define R8A7790_CLK_PCIEC		19

#define R8A7790_CLK_IIC1		23

#define R8A7790_CLK_IIC1		23

#define R8A7790_CLK_SSUSB		28

#define R8A7790_CLK_SSUSB		28

#define R8A7790_CLK_CMT1		29

#define R8A7790_CLK_CMT1		29