Loading arch/arm/Kconfig +1 −5 Original line number Diff line number Diff line Loading @@ -5,6 +5,7 @@ config ARM select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_HAVE_CUSTOM_GPIO_H select ARCH_USE_CMPXCHG_LOCKREF select ARCH_WANT_IPC_PARSE_VERSION select BUILDTIME_EXTABLE_SORT if MMU select CLONE_BACKWARDS Loading Loading @@ -1091,11 +1092,6 @@ config IWMMXT Enable support for iWMMXt context switching at run time if running on a CPU that supports it. config XSCALE_PMU bool depends on CPU_XSCALE default y config MULTI_IRQ_HANDLER bool help Loading arch/arm/Kconfig.debug +36 −5 Original line number Diff line number Diff line Loading @@ -318,6 +318,7 @@ choice config DEBUG_MSM_UART1 bool "Kernel low-level debugging messages via MSM UART1" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the first serial port on MSM devices. Loading @@ -325,6 +326,7 @@ choice config DEBUG_MSM_UART2 bool "Kernel low-level debugging messages via MSM UART2" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the second serial port on MSM devices. Loading @@ -332,6 +334,7 @@ choice config DEBUG_MSM_UART3 bool "Kernel low-level debugging messages via MSM UART3" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the third serial port on MSM devices. Loading @@ -340,6 +343,7 @@ choice bool "Kernel low-level debugging messages via MSM 8660 UART" depends on ARCH_MSM8X60 select MSM_HAS_DEBUG_UART_HS select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8660 devices. Loading @@ -348,10 +352,20 @@ choice bool "Kernel low-level debugging messages via MSM 8960 UART" depends on ARCH_MSM8960 select MSM_HAS_DEBUG_UART_HS select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8960 devices. config DEBUG_MSM8974_UART bool "Kernel low-level debugging messages via MSM 8974 UART" depends on ARCH_MSM8974 select MSM_HAS_DEBUG_UART_HS select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8974 devices. config DEBUG_MVEBU_UART bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)" depends on ARCH_MVEBU Loading Loading @@ -834,6 +848,20 @@ choice options; the platform specific options are deprecated and will be soon removed. config DEBUG_LL_UART_EFM32 bool "Kernel low-level debugging via efm32 UART" depends on ARCH_EFM32 help Say Y here if you want the debug print routines to direct their output to an UART or USART port on efm32 based machines. Use the following addresses for DEBUG_UART_PHYS: 0x4000c000 | USART0 0x4000c400 | USART1 0x4000c800 | USART2 0x4000e000 | UART0 0x4000e400 | UART1 config DEBUG_LL_UART_PL01X bool "Kernel low-level debugging via ARM Ltd PL01x Primecell UART" help Loading Loading @@ -880,11 +908,16 @@ config DEBUG_STI_UART bool depends on ARCH_STI config DEBUG_MSM_UART bool depends on ARCH_MSM config DEBUG_LL_INCLUDE string default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250 default "debug/pl01x.S" if DEBUG_LL_UART_PL01X || DEBUG_UART_PL01X default "debug/exynos.S" if DEBUG_EXYNOS_UART default "debug/efm32.S" if DEBUG_LL_UART_EFM32 default "debug/icedcc.S" if DEBUG_ICEDCC default "debug/imx.S" if DEBUG_IMX1_UART || \ DEBUG_IMX25_UART || \ Loading @@ -895,11 +928,7 @@ config DEBUG_LL_INCLUDE DEBUG_IMX53_UART ||\ DEBUG_IMX6Q_UART || \ DEBUG_IMX6SL_UART default "debug/msm.S" if DEBUG_MSM_UART1 || \ DEBUG_MSM_UART2 || \ DEBUG_MSM_UART3 || \ DEBUG_MSM8660_UART || \ DEBUG_MSM8960_UART default "debug/msm.S" if DEBUG_MSM_UART default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1 default "debug/sti.S" if DEBUG_STI_UART Loading Loading @@ -951,6 +980,7 @@ config DEBUG_UART_PHYS default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0x20201000 if DEBUG_BCM2835 default 0x4000e400 if DEBUG_LL_UART_EFM32 default 0x40090000 if ARCH_LPC32XX default 0x40100000 if DEBUG_PXA_UART1 default 0x42000000 if ARCH_GEMINI Loading Loading @@ -981,6 +1011,7 @@ config DEBUG_UART_PHYS default 0xfff36000 if DEBUG_HIGHBANK_UART default 0xfffff700 if ARCH_IOP33X depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ DEBUG_LL_UART_EFM32 || \ DEBUG_UART_8250 || DEBUG_UART_PL01X config DEBUG_UART_VIRT Loading arch/arm/common/mcpm_entry.c +15 −0 Original line number Diff line number Diff line Loading @@ -90,6 +90,21 @@ void mcpm_cpu_power_down(void) BUG(); } int mcpm_cpu_power_down_finish(unsigned int cpu, unsigned int cluster) { int ret; if (WARN_ON_ONCE(!platform_ops || !platform_ops->power_down_finish)) return -EUNATCH; ret = platform_ops->power_down_finish(cpu, cluster); if (ret) pr_warn("%s: cpu %u, cluster %u failed to power down (%d)\n", __func__, cpu, cluster, ret); return ret; } void mcpm_cpu_suspend(u64 expected_residency) { phys_reset_t phys_reset; Loading arch/arm/common/mcpm_platsmp.c +23 −4 Original line number Diff line number Diff line Loading @@ -19,14 +19,23 @@ #include <asm/smp.h> #include <asm/smp_plat.h> static void cpu_to_pcpu(unsigned int cpu, unsigned int *pcpu, unsigned int *pcluster) { unsigned int mpidr; mpidr = cpu_logical_map(cpu); *pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); *pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); } static int mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned int mpidr, pcpu, pcluster, ret; unsigned int pcpu, pcluster, ret; extern void secondary_startup(void); mpidr = cpu_logical_map(cpu); pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); cpu_to_pcpu(cpu, &pcpu, &pcluster); pr_debug("%s: logical CPU %d is physical CPU %d cluster %d\n", __func__, cpu, pcpu, pcluster); Loading @@ -47,6 +56,15 @@ static void mcpm_secondary_init(unsigned int cpu) #ifdef CONFIG_HOTPLUG_CPU static int mcpm_cpu_kill(unsigned int cpu) { unsigned int pcpu, pcluster; cpu_to_pcpu(cpu, &pcpu, &pcluster); return !mcpm_cpu_power_down_finish(pcpu, pcluster); } static int mcpm_cpu_disable(unsigned int cpu) { /* Loading @@ -73,6 +91,7 @@ static struct smp_operations __initdata mcpm_smp_ops = { .smp_boot_secondary = mcpm_boot_secondary, .smp_secondary_init = mcpm_secondary_init, #ifdef CONFIG_HOTPLUG_CPU .cpu_kill = mcpm_cpu_kill, .cpu_disable = mcpm_cpu_disable, .cpu_die = mcpm_cpu_die, #endif Loading arch/arm/common/timer-sp.c +1 −1 Original line number Diff line number Diff line Loading @@ -175,7 +175,7 @@ static struct clock_event_device sp804_clockevent = { static struct irqaction sp804_timer_irq = { .name = "timer", .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, .flags = IRQF_TIMER | IRQF_IRQPOLL, .handler = sp804_timer_interrupt, .dev_id = &sp804_clockevent, }; Loading Loading
arch/arm/Kconfig +1 −5 Original line number Diff line number Diff line Loading @@ -5,6 +5,7 @@ config ARM select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_HAVE_CUSTOM_GPIO_H select ARCH_USE_CMPXCHG_LOCKREF select ARCH_WANT_IPC_PARSE_VERSION select BUILDTIME_EXTABLE_SORT if MMU select CLONE_BACKWARDS Loading Loading @@ -1091,11 +1092,6 @@ config IWMMXT Enable support for iWMMXt context switching at run time if running on a CPU that supports it. config XSCALE_PMU bool depends on CPU_XSCALE default y config MULTI_IRQ_HANDLER bool help Loading
arch/arm/Kconfig.debug +36 −5 Original line number Diff line number Diff line Loading @@ -318,6 +318,7 @@ choice config DEBUG_MSM_UART1 bool "Kernel low-level debugging messages via MSM UART1" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the first serial port on MSM devices. Loading @@ -325,6 +326,7 @@ choice config DEBUG_MSM_UART2 bool "Kernel low-level debugging messages via MSM UART2" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the second serial port on MSM devices. Loading @@ -332,6 +334,7 @@ choice config DEBUG_MSM_UART3 bool "Kernel low-level debugging messages via MSM UART3" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the third serial port on MSM devices. Loading @@ -340,6 +343,7 @@ choice bool "Kernel low-level debugging messages via MSM 8660 UART" depends on ARCH_MSM8X60 select MSM_HAS_DEBUG_UART_HS select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8660 devices. Loading @@ -348,10 +352,20 @@ choice bool "Kernel low-level debugging messages via MSM 8960 UART" depends on ARCH_MSM8960 select MSM_HAS_DEBUG_UART_HS select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8960 devices. config DEBUG_MSM8974_UART bool "Kernel low-level debugging messages via MSM 8974 UART" depends on ARCH_MSM8974 select MSM_HAS_DEBUG_UART_HS select DEBUG_MSM_UART help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8974 devices. config DEBUG_MVEBU_UART bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)" depends on ARCH_MVEBU Loading Loading @@ -834,6 +848,20 @@ choice options; the platform specific options are deprecated and will be soon removed. config DEBUG_LL_UART_EFM32 bool "Kernel low-level debugging via efm32 UART" depends on ARCH_EFM32 help Say Y here if you want the debug print routines to direct their output to an UART or USART port on efm32 based machines. Use the following addresses for DEBUG_UART_PHYS: 0x4000c000 | USART0 0x4000c400 | USART1 0x4000c800 | USART2 0x4000e000 | UART0 0x4000e400 | UART1 config DEBUG_LL_UART_PL01X bool "Kernel low-level debugging via ARM Ltd PL01x Primecell UART" help Loading Loading @@ -880,11 +908,16 @@ config DEBUG_STI_UART bool depends on ARCH_STI config DEBUG_MSM_UART bool depends on ARCH_MSM config DEBUG_LL_INCLUDE string default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250 default "debug/pl01x.S" if DEBUG_LL_UART_PL01X || DEBUG_UART_PL01X default "debug/exynos.S" if DEBUG_EXYNOS_UART default "debug/efm32.S" if DEBUG_LL_UART_EFM32 default "debug/icedcc.S" if DEBUG_ICEDCC default "debug/imx.S" if DEBUG_IMX1_UART || \ DEBUG_IMX25_UART || \ Loading @@ -895,11 +928,7 @@ config DEBUG_LL_INCLUDE DEBUG_IMX53_UART ||\ DEBUG_IMX6Q_UART || \ DEBUG_IMX6SL_UART default "debug/msm.S" if DEBUG_MSM_UART1 || \ DEBUG_MSM_UART2 || \ DEBUG_MSM_UART3 || \ DEBUG_MSM8660_UART || \ DEBUG_MSM8960_UART default "debug/msm.S" if DEBUG_MSM_UART default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1 default "debug/sti.S" if DEBUG_STI_UART Loading Loading @@ -951,6 +980,7 @@ config DEBUG_UART_PHYS default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0x20201000 if DEBUG_BCM2835 default 0x4000e400 if DEBUG_LL_UART_EFM32 default 0x40090000 if ARCH_LPC32XX default 0x40100000 if DEBUG_PXA_UART1 default 0x42000000 if ARCH_GEMINI Loading Loading @@ -981,6 +1011,7 @@ config DEBUG_UART_PHYS default 0xfff36000 if DEBUG_HIGHBANK_UART default 0xfffff700 if ARCH_IOP33X depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ DEBUG_LL_UART_EFM32 || \ DEBUG_UART_8250 || DEBUG_UART_PL01X config DEBUG_UART_VIRT Loading
arch/arm/common/mcpm_entry.c +15 −0 Original line number Diff line number Diff line Loading @@ -90,6 +90,21 @@ void mcpm_cpu_power_down(void) BUG(); } int mcpm_cpu_power_down_finish(unsigned int cpu, unsigned int cluster) { int ret; if (WARN_ON_ONCE(!platform_ops || !platform_ops->power_down_finish)) return -EUNATCH; ret = platform_ops->power_down_finish(cpu, cluster); if (ret) pr_warn("%s: cpu %u, cluster %u failed to power down (%d)\n", __func__, cpu, cluster, ret); return ret; } void mcpm_cpu_suspend(u64 expected_residency) { phys_reset_t phys_reset; Loading
arch/arm/common/mcpm_platsmp.c +23 −4 Original line number Diff line number Diff line Loading @@ -19,14 +19,23 @@ #include <asm/smp.h> #include <asm/smp_plat.h> static void cpu_to_pcpu(unsigned int cpu, unsigned int *pcpu, unsigned int *pcluster) { unsigned int mpidr; mpidr = cpu_logical_map(cpu); *pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); *pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); } static int mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned int mpidr, pcpu, pcluster, ret; unsigned int pcpu, pcluster, ret; extern void secondary_startup(void); mpidr = cpu_logical_map(cpu); pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); cpu_to_pcpu(cpu, &pcpu, &pcluster); pr_debug("%s: logical CPU %d is physical CPU %d cluster %d\n", __func__, cpu, pcpu, pcluster); Loading @@ -47,6 +56,15 @@ static void mcpm_secondary_init(unsigned int cpu) #ifdef CONFIG_HOTPLUG_CPU static int mcpm_cpu_kill(unsigned int cpu) { unsigned int pcpu, pcluster; cpu_to_pcpu(cpu, &pcpu, &pcluster); return !mcpm_cpu_power_down_finish(pcpu, pcluster); } static int mcpm_cpu_disable(unsigned int cpu) { /* Loading @@ -73,6 +91,7 @@ static struct smp_operations __initdata mcpm_smp_ops = { .smp_boot_secondary = mcpm_boot_secondary, .smp_secondary_init = mcpm_secondary_init, #ifdef CONFIG_HOTPLUG_CPU .cpu_kill = mcpm_cpu_kill, .cpu_disable = mcpm_cpu_disable, .cpu_die = mcpm_cpu_die, #endif Loading
arch/arm/common/timer-sp.c +1 −1 Original line number Diff line number Diff line Loading @@ -175,7 +175,7 @@ static struct clock_event_device sp804_clockevent = { static struct irqaction sp804_timer_irq = { .name = "timer", .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, .flags = IRQF_TIMER | IRQF_IRQPOLL, .handler = sp804_timer_interrupt, .dev_id = &sp804_clockevent, }; Loading