Loading arch/arm64/boot/dts/qcom/kona-rumi.dtsi +33 −0 Original line number Diff line number Diff line Loading @@ -41,3 +41,36 @@ spm-level = <0>; status = "ok"; }; &soc { usb_emu_phy: usb_emu_phy@a720000 { compatible = "qcom,usb-emu-phy"; reg = <0x0a720000 0x9500>, <0x0a6f8800 0x100>; reg-names = "base", "qscratch_base"; qcom,emu-init-seq = <0xfff0 0x4 0xfff3 0x4 0x40 0x4 0xfff3 0x4 0xfff0 0x4 0x100000 0x20 0x0 0x20 0x1a0 0x20 0x100000 0x3c 0x0 0x3c 0x10060 0x3c 0x0 0x4>; }; usb_nop_phy: usb_nop_phy { compatible = "usb-nop-xceiv"; }; }; &usb0 { dwc3@a600000 { usb-phy = <&usb_emu_phy>, <&usb_nop_phy>; maximum-speed = "high-speed"; }; }; arch/arm64/boot/dts/qcom/kona-usb.dtsi 0 → 100644 +63 −0 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. */ #include <dt-bindings/clock/qcom,gcc-kona.h> &soc { /* Primary USB port related controller */ usb0: ssusb@a600000 { compatible = "qcom,dwc-usb3-msm"; reg = <0x0a600000 0x100000>; reg-names = "core_base"; iommus = <&apps_smmu 0x0 0x0>; #address-cells = <1>; #size-cells = <1>; ranges; interrupts = <0 494 0>, <0 130 0>, <0 497 0>, <0 495 0>; interrupt-names = "dp_hs_phy_irq", "pwr_event_irq", "ss_phy_irq", "dm_hs_phy_irq"; qcom,use-pdc-interrupts; USB3_GDSC-supply = <&usb30_prim_gdsc>; clocks = <&clock_gcc GCC_USB30_PRIM_MASTER_CLK>, <&clock_gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&clock_gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, <&clock_gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&clock_gcc GCC_USB30_PRIM_SLEEP_CLK>, /* * GCC_USB3_SEC_CLKREF_EN provides ref_clk for both * USB instances. */ <&clock_gcc GCC_USB3_SEC_CLKREF_EN>; clock-names = "core_clk", "iface_clk", "bus_aggr_clk", "utmi_clk", "sleep_clk", "xo"; resets = <&clock_gcc GCC_USB30_PRIM_BCR>; reset-names = "core_reset"; qcom,core-clk-rate = <200000000>; qcom,core-clk-rate-hs = <66666667>; qcom,num-gsi-evt-buffs = <0x3>; qcom,dwc-usb3-msm-tx-fifo-size = <27696>; dwc3@a600000 { compatible = "snps,dwc3"; reg = <0x0a600000 0xcd00>; interrupts = <0 133 0>; linux,sysdev_is_parent; snps,disable-clk-gating; snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x10>; snps,ssp-u3-u0-quirk; snps,usb3-u1u2-disable; usb-core-id = <0>; tx-fifo-resize; maximum-speed = "super-speed-plus"; dr_mode = "drd"; }; }; }; arch/arm64/boot/dts/qcom/kona.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1030,3 +1030,4 @@ #include "msm-arm-smmu-kona.dtsi" #include "kona-pinctrl.dtsi" #include "kona-smp2p.dtsi" #include "kona-usb.dtsi" Loading
arch/arm64/boot/dts/qcom/kona-rumi.dtsi +33 −0 Original line number Diff line number Diff line Loading @@ -41,3 +41,36 @@ spm-level = <0>; status = "ok"; }; &soc { usb_emu_phy: usb_emu_phy@a720000 { compatible = "qcom,usb-emu-phy"; reg = <0x0a720000 0x9500>, <0x0a6f8800 0x100>; reg-names = "base", "qscratch_base"; qcom,emu-init-seq = <0xfff0 0x4 0xfff3 0x4 0x40 0x4 0xfff3 0x4 0xfff0 0x4 0x100000 0x20 0x0 0x20 0x1a0 0x20 0x100000 0x3c 0x0 0x3c 0x10060 0x3c 0x0 0x4>; }; usb_nop_phy: usb_nop_phy { compatible = "usb-nop-xceiv"; }; }; &usb0 { dwc3@a600000 { usb-phy = <&usb_emu_phy>, <&usb_nop_phy>; maximum-speed = "high-speed"; }; };
arch/arm64/boot/dts/qcom/kona-usb.dtsi 0 → 100644 +63 −0 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. */ #include <dt-bindings/clock/qcom,gcc-kona.h> &soc { /* Primary USB port related controller */ usb0: ssusb@a600000 { compatible = "qcom,dwc-usb3-msm"; reg = <0x0a600000 0x100000>; reg-names = "core_base"; iommus = <&apps_smmu 0x0 0x0>; #address-cells = <1>; #size-cells = <1>; ranges; interrupts = <0 494 0>, <0 130 0>, <0 497 0>, <0 495 0>; interrupt-names = "dp_hs_phy_irq", "pwr_event_irq", "ss_phy_irq", "dm_hs_phy_irq"; qcom,use-pdc-interrupts; USB3_GDSC-supply = <&usb30_prim_gdsc>; clocks = <&clock_gcc GCC_USB30_PRIM_MASTER_CLK>, <&clock_gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&clock_gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, <&clock_gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&clock_gcc GCC_USB30_PRIM_SLEEP_CLK>, /* * GCC_USB3_SEC_CLKREF_EN provides ref_clk for both * USB instances. */ <&clock_gcc GCC_USB3_SEC_CLKREF_EN>; clock-names = "core_clk", "iface_clk", "bus_aggr_clk", "utmi_clk", "sleep_clk", "xo"; resets = <&clock_gcc GCC_USB30_PRIM_BCR>; reset-names = "core_reset"; qcom,core-clk-rate = <200000000>; qcom,core-clk-rate-hs = <66666667>; qcom,num-gsi-evt-buffs = <0x3>; qcom,dwc-usb3-msm-tx-fifo-size = <27696>; dwc3@a600000 { compatible = "snps,dwc3"; reg = <0x0a600000 0xcd00>; interrupts = <0 133 0>; linux,sysdev_is_parent; snps,disable-clk-gating; snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x10>; snps,ssp-u3-u0-quirk; snps,usb3-u1u2-disable; usb-core-id = <0>; tx-fifo-resize; maximum-speed = "super-speed-plus"; dr_mode = "drd"; }; }; };
arch/arm64/boot/dts/qcom/kona.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1030,3 +1030,4 @@ #include "msm-arm-smmu-kona.dtsi" #include "kona-pinctrl.dtsi" #include "kona-smp2p.dtsi" #include "kona-usb.dtsi"