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Commit e9a2f409 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Kukjin Kim
Browse files

ARM: dts: Use labels for overriding nodes in exynos5250 



Usage of labels instead of full paths reduces possible mistakes when
overriding nodes.

Signed-off-by: default avatarKrzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: default avatarKukjin Kim <kgene@kernel.org>
parent 7c23e7e1

arch/arm/boot/dts/exynos5250.dtsi

+41 −41
Original line number Diff line number Diff line
@@ -241,13 +241,6 @@ 
		clock-names = "mfc";

	};



	rtc: rtc@101E0000 {

		clocks = <&clock CLK_RTC>;

		clock-names = "rtc";

		interrupt-parent = <&pmu_system_controller>;

		status = "disabled";

	};



	tmu: tmu@10060000 {

		compatible = "samsung,exynos5250-tmu";

		reg = <0x10060000 0x100>;
@@ -276,26 +269,6 @@ 
		};

	};



	serial@12C00000 {

		clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;

		clock-names = "uart", "clk_uart_baud0";

	};



	serial@12C10000 {

		clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;

		clock-names = "uart", "clk_uart_baud0";

	};



	serial@12C20000 {

		clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;

		clock-names = "uart", "clk_uart_baud0";

	};



	serial@12C30000 {

		clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;

		clock-names = "uart", "clk_uart_baud0";

	};



	sata: sata@122F0000 {

		compatible = "snps,dwc-ahci";

		samsung,sata-freq = <66>;
@@ -778,20 +751,6 @@ 
		#phy-cells = <0>;

	};



	dp: dp-controller@145B0000 {

		power-domains = <&pd_disp1>;

		clocks = <&clock CLK_DP>;

		clock-names = "dp";

		phys = <&dp_phy>;

		phy-names = "dp";

	};



	fimd: fimd@14400000 {

		power-domains = <&pd_disp1>;

		clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;

		clock-names = "sclk_fimd", "fimd";

	};



	adc: adc@12D10000 {

		compatible = "samsung,exynos-adc-v1";

		reg = <0x12D10000 0x100>;
@@ -812,3 +771,44 @@ 
		clock-names = "secss";

	};

};



&dp {

	power-domains = <&pd_disp1>;

	clocks = <&clock CLK_DP>;

	clock-names = "dp";

	phys = <&dp_phy>;

	phy-names = "dp";

};



&fimd {

	power-domains = <&pd_disp1>;

	clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;

	clock-names = "sclk_fimd", "fimd";

};



&rtc {

	clocks = <&clock CLK_RTC>;

	clock-names = "rtc";

	interrupt-parent = <&pmu_system_controller>;

	status = "disabled";

};



&serial_0 {

	clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;

	clock-names = "uart", "clk_uart_baud0";

};



&serial_1 {

	clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;

	clock-names = "uart", "clk_uart_baud0";

};



&serial_2 {

	clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;

	clock-names = "uart", "clk_uart_baud0";

};



&serial_3 {

	clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;

	clock-names = "uart", "clk_uart_baud0";

};