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Commit e8abb5b5 authored by Rob Clark's avatar Rob Clark
Browse files

drm/msm/mdp4: add mdp axi clk 



Downstream kernel holds this clk via a fake-parent relationship.
Upstream clock framework requires that we hold it explicitly.

Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 034fbcc3

drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c

+11 −0
Original line number Diff line number Diff line
@@ -176,6 +176,8 @@ int mdp4_disable(struct mdp4_kms *mdp4_kms) 
	if (mdp4_kms->pclk)

		clk_disable_unprepare(mdp4_kms->pclk);

	clk_disable_unprepare(mdp4_kms->lut_clk);

	if (mdp4_kms->axi_clk)

		clk_disable_unprepare(mdp4_kms->axi_clk);



	return 0;

}
@@ -188,6 +190,8 @@ int mdp4_enable(struct mdp4_kms *mdp4_kms) 
	if (mdp4_kms->pclk)

		clk_prepare_enable(mdp4_kms->pclk);

	clk_prepare_enable(mdp4_kms->lut_clk);

	if (mdp4_kms->axi_clk)

		clk_prepare_enable(mdp4_kms->axi_clk);



	return 0;

}
@@ -335,6 +339,13 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev) 
		goto fail;

	}



	mdp4_kms->axi_clk = devm_clk_get(&pdev->dev, "mdp_axi_clk");

	if (IS_ERR(mdp4_kms->axi_clk)) {

		dev_err(dev->dev, "failed to get axi_clk\n");

		ret = PTR_ERR(mdp4_kms->axi_clk);

		goto fail;

	}



	clk_set_rate(mdp4_kms->clk, config->max_clk);

	clk_set_rate(mdp4_kms->lut_clk, config->max_clk);

drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h

+1 −0
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ struct mdp4_kms { 
	struct clk *clk;

	struct clk *pclk;

	struct clk *lut_clk;

	struct clk *axi_clk;



	struct mdp_irq error_handler;