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Commit e88e2cd7 authored by Gregory CLEMENT's avatar Gregory CLEMENT
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pinctrl: dt-bindings: add documentation for AP806 pin controllers



Document the device tree binding for the pin controllers found on the
Armada 7K and Armada 8K SoCs.

Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent bbc6fd0a
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+46 −7
Original line number Diff line number Diff line
@@ -28,9 +28,44 @@ Required properties:
 - compatible: must be: "marvell,ap806-clock"
 - #clock-cells: must be set to 1

Example:
Pinctrl:
--------

For common binding part and usage, refer to
Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt.

Required properties:
- compatible must be "marvell,ap806-pinctrl",

Available mpp pins/groups and functions:
Note: brackets (x) are not part of the mpp name for marvell,function and given
only for more detailed description in this document.

	syscon: system-controller@6f4000 {
name	pins	functions
================================================================================
mpp0	0	gpio, sdio(clk), spi0(clk)
mpp1	1	gpio, sdio(cmd), spi0(miso)
mpp2	2	gpio, sdio(d0), spi0(mosi)
mpp3	3	gpio, sdio(d1), spi0(cs0n)
mpp4	4	gpio, sdio(d2), i2c0(sda)
mpp5	5	gpio, sdio(d3), i2c0(sdk)
mpp6	6	gpio, sdio(ds)
mpp7	7	gpio, sdio(d4), uart1(rxd)
mpp8	8	gpio, sdio(d5), uart1(txd)
mpp9	9	gpio, sdio(d6), spi0(cs1n)
mpp10	10	gpio, sdio(d7)
mpp11	11	gpio, uart0(txd)
mpp12	12	gpio, sdio(pw_off), sdio(hw_rst)
mpp13	13	gpio
mpp14	14	gpio
mpp15	15	gpio
mpp16	16	gpio
mpp17	17	gpio
mpp18	18	gpio
mpp19	19	gpio, uart0(rxd), sdio(pw_off)

Example:
ap_syscon: system-controller@6f4000 {
	compatible = "syscon", "simple-mfd";
	reg = <0x6f4000 0x1000>;

@@ -38,4 +73,8 @@ Example:
		compatible = "marvell,ap806-clock";
		#clock-cells = <1>;
	};

	ap_pinctrl: pinctrl {
		compatible = "marvell,ap806-pinctrl";
	};
};