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Commit e722870e authored by Urvashi Agrawal's avatar Urvashi Agrawal
Browse files

msm: kgsl: Add support for primitive threshold value 



The primitve threshold value is different for almost every
chip, so instead of using a whole lot of if else, use the
gpu feature list to specify its value.

Change-Id: I020e4237e0f965f3816a640cde2f33659e6192ca
Signed-off-by: default avatarUrvashi Agrawal <urvaagra@codeaurora.org>
parent b058dd78

drivers/gpu/msm/adreno-gpulist.h

+10 −0
Original line number Diff line number Diff line
@@ -331,6 +331,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.gpmu_minor = 0x003,

		.gpmu_tsens = 0x000C000D,

		.max_power = 5448,

		.prim_fifo_threshold = 0x0018000,

	},

	{

		.gpurev = ADRENO_REV_A630,
@@ -352,6 +353,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.gpmu_minor = 0x003,

		.gpmu_tsens = 0x000C000D,

		.max_power = 5448,

		.prim_fifo_threshold = 0x0018000,

	},

	{

		.gpurev = ADRENO_REV_A615,
@@ -371,6 +373,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.gpmufw_name = "a630_gmu.bin",

		.gpmu_major = 0x1,

		.gpmu_minor = 0x003,

		.prim_fifo_threshold = 0x0018000,

	},

	{

		.gpurev = ADRENO_REV_A618,
@@ -390,6 +393,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.gpmufw_name = "a630_gmu.bin",

		.gpmu_major = 0x1,

		.gpmu_minor = 0x007,

		.prim_fifo_threshold = 0x0018000,

	},

	{

		.gpurev = ADRENO_REV_A640,
@@ -412,6 +416,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.gpmu_tsens = 0x000C000D,

		.max_power = 5448,

		.va_padding = SZ_64K,

		.prim_fifo_threshold = 0x00200000,

	},

	{

		.gpurev = ADRENO_REV_A640,
@@ -433,6 +438,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.gpmu_minor = 0x000,

		.gpmu_tsens = 0x000C000D,

		.max_power = 5448,

		.prim_fifo_threshold = 0x00200000,

	},

	{

		.gpurev = ADRENO_REV_A650,
@@ -452,6 +458,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.gpmu_minor = 0x000,

		.gpmu_tsens = 0x000C000D,

		.max_power = 5448,

		.prim_fifo_threshold = 0x00300000,

	},

	{

		.gpurev = ADRENO_REV_A680,
@@ -471,6 +478,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.gpmu_minor = 0x000,

		.gpmu_tsens = 0x000C000D,

		.max_power = 5448,

		.prim_fifo_threshold = 0x00400000,

	},

	{

		.gpurev = ADRENO_REV_A612,
@@ -488,6 +496,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.num_protected_regs = 0x20,

		.busy_mask = 0xFFFFFFFE,

		.gpmufw_name = "a612_rgmu.bin",

		.prim_fifo_threshold = 0x00080000,

	},

	{

		.gpurev = ADRENO_REV_A616,
@@ -507,5 +516,6 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.gpmufw_name = "a630_gmu.bin",

		.gpmu_major = 0x1,

		.gpmu_minor = 0x003,

		.prim_fifo_threshold = 0x0018000,

	},

};

drivers/gpu/msm/adreno.h

+1 −0
Original line number Diff line number Diff line
@@ -418,6 +418,7 @@ struct adreno_gpu_core { 
	unsigned int gpmu_tsens;

	unsigned int max_power;

	uint64_t va_padding;

	unsigned int prim_fifo_threshold;

};

drivers/gpu/msm/adreno_a6xx.c

+2 −8
Original line number Diff line number Diff line
@@ -899,14 +899,8 @@ static void a6xx_start(struct adreno_device *adreno_dev) 
	}



	/* Setting the primFifo thresholds values */

	if (adreno_is_a640(adreno_dev))

		kgsl_regwrite(device, A6XX_PC_DBG_ECO_CNTL, (0x400 << 11));

	else if (adreno_is_a680(adreno_dev))

		kgsl_regwrite(device, A6XX_PC_DBG_ECO_CNTL, (0x800 << 11));

	else if (adreno_is_a612(adreno_dev))

		kgsl_regwrite(device, A6XX_PC_DBG_ECO_CNTL, (0x100 << 11));

	else

		kgsl_regwrite(device, A6XX_PC_DBG_ECO_CNTL, (0x300 << 11));

	kgsl_regwrite(device, A6XX_PC_DBG_ECO_CNTL,

			adreno_dev->gpucore->prim_fifo_threshold);



	/* Set the AHB default slave response to "ERROR" */

	kgsl_regwrite(device, A6XX_CP_AHB_CNTL, 0x1);