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Commit e5c3370f authored by Akeem G Abodunrin's avatar Akeem G Abodunrin Committed by Jeff Kirsher
Browse files

igb: Read register for latch_on without return value 



This patch changes register read to "just-read" without returning a value
for hardware to accurately latch the register value.

Signed-off-by: default avatarAkeem G Abodunrin <akeem.g.abodunrin@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 8a650aa2

drivers/net/ethernet/intel/igb/e1000_82575.c

+4 −5
Original line number Diff line number Diff line
@@ -1320,7 +1320,7 @@ void igb_shutdown_serdes_link_82575(struct e1000_hw *hw) 
 **/

static s32 igb_reset_hw_82575(struct e1000_hw *hw)

{

	u32 ctrl, icr;

	u32 ctrl;

	s32 ret_val;



	/* Prevent the PCI-E bus from sticking if there is no TLP connection
@@ -1365,7 +1365,7 @@ static s32 igb_reset_hw_82575(struct e1000_hw *hw) 


	/* Clear any pending interrupt events. */

	wr32(E1000_IMC, 0xffffffff);

	icr = rd32(E1000_ICR);

	rd32(E1000_ICR);



	/* Install any alternate MAC address into RAR0 */

	ret_val = igb_check_alt_mac_addr(hw);
@@ -2103,10 +2103,9 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw) 
	s32 ret_val = 0;

	/* BH SW mailbox bit in SW_FW_SYNC */

	u16 swmbsw_mask = E1000_SW_SYNCH_MB;

	u32 ctrl, icr;

	u32 ctrl;

	bool global_device_reset = hw->dev_spec._82575.global_device_reset;





	hw->dev_spec._82575.global_device_reset = false;



	/* due to hw errata, global device reset doesn't always
@@ -2165,7 +2164,7 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw) 


	/* Clear any pending interrupt events. */

	wr32(E1000_IMC, 0xffffffff);

	icr = rd32(E1000_ICR);

	rd32(E1000_ICR);



	ret_val = igb_reset_mdicnfg_82580(hw);

	if (ret_val)

drivers/net/ethernet/intel/igb/igb_main.c

+4 −10
Original line number Diff line number Diff line
@@ -3844,7 +3844,6 @@ bool igb_has_link(struct igb_adapter *adapter) 
{

	struct e1000_hw *hw = &adapter->hw;

	bool link_active = false;

	s32 ret_val = 0;



	/* get_link_status is set on LSC (link status) interrupt or

	 * rx sequence error interrupt.  get_link_status will stay
@@ -3853,16 +3852,11 @@ bool igb_has_link(struct igb_adapter *adapter) 
	 */

	switch (hw->phy.media_type) {

	case e1000_media_type_copper:

		if (hw->mac.get_link_status) {

			ret_val = hw->mac.ops.check_for_link(hw);

			link_active = !hw->mac.get_link_status;

		} else {

			link_active = true;

		}

		break;

		if (!hw->mac.get_link_status)

			return true;

	case e1000_media_type_internal_serdes:

		ret_val = hw->mac.ops.check_for_link(hw);

		link_active = hw->mac.serdes_has_link;

		hw->mac.ops.check_for_link(hw);

		link_active = !hw->mac.get_link_status;

		break;

	default:

	case e1000_media_type_unknown:

drivers/net/ethernet/intel/igb/igb_ptp.c

+4 −4
Original line number Diff line number Diff line
@@ -97,14 +97,14 @@ static cycle_t igb_ptp_read_82580(const struct cyclecounter *cc) 
{

	struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);

	struct e1000_hw *hw = &igb->hw;

	u32 lo, hi;

	u64 val;

	u32 lo, hi, jk;



	/* The timestamp latches on lowest register read. For the 82580

	 * the lowest register is SYSTIMR instead of SYSTIML.  However we only

	 * need to provide nanosecond resolution, so we just ignore it.

	 */

	jk = rd32(E1000_SYSTIMR);

	rd32(E1000_SYSTIMR);

	lo = rd32(E1000_SYSTIML);

	hi = rd32(E1000_SYSTIMH);
@@ -118,13 +118,13 @@ static cycle_t igb_ptp_read_82580(const struct cyclecounter *cc) 
static void igb_ptp_read_i210(struct igb_adapter *adapter, struct timespec *ts)

{

	struct e1000_hw *hw = &adapter->hw;

	u32 sec, nsec, jk;

	u32 sec, nsec;



	/* The timestamp latches on lowest register read. For I210/I211, the

	 * lowest register is SYSTIMR. Since we only need to provide nanosecond

	 * resolution, we can ignore it.

	 */

	jk = rd32(E1000_SYSTIMR);

	rd32(E1000_SYSTIMR);

	nsec = rd32(E1000_SYSTIML);

	sec = rd32(E1000_SYSTIMH);