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Commit e5857731 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "cnss2: Update bound checks for sbl reg dumps to SRAM mem range"

parents 26fb8ab7 a1c23ce2
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+8 −14
Original line number Original line Diff line number Diff line
@@ -1885,9 +1885,9 @@ static void cnss_pci_dump_qca6390_sram_mem(struct cnss_pci_data *pci_priv)
	sbl_log_size = (sbl_log_size > QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE ?
	sbl_log_size = (sbl_log_size > QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE ?
			QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE : sbl_log_size);
			QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE : sbl_log_size);


	if (sbl_log_start < QCA6390_V2_SBL_DATA_START ||
	if (sbl_log_start < SRAM_START ||
	    sbl_log_start > QCA6390_V2_SBL_DATA_END ||
	    sbl_log_start > SRAM_END ||
	    (sbl_log_start + sbl_log_size) > QCA6390_V2_SBL_DATA_END)
	    (sbl_log_start + sbl_log_size) > SRAM_END)
		goto out;
		goto out;


	cnss_pr_dbg("Dumping SBL log data\n");
	cnss_pr_dbg("Dumping SBL log data\n");
@@ -1955,17 +1955,11 @@ static void cnss_pci_dump_bl_sram_mem(struct cnss_pci_data *pci_priv)


	sbl_log_size = (sbl_log_size > QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE ?
	sbl_log_size = (sbl_log_size > QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE ?
			QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE : sbl_log_size);
			QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE : sbl_log_size);
	if (plat_priv->device_version.major_version == FW_V2_NUMBER) {

		if (sbl_log_start < QCA6490_V2_SBL_DATA_START ||
	if (sbl_log_start < SRAM_START ||
		    sbl_log_start > QCA6490_V2_SBL_DATA_END ||
	    sbl_log_start > SRAM_END ||
		    (sbl_log_start + sbl_log_size) > QCA6490_V2_SBL_DATA_END)
	    (sbl_log_start + sbl_log_size) > SRAM_END)
			goto out;
	} else {
		if (sbl_log_start < QCA6490_V1_SBL_DATA_START ||
		    sbl_log_start > QCA6490_V1_SBL_DATA_END ||
		    (sbl_log_start + sbl_log_size) > QCA6490_V1_SBL_DATA_END)
		goto out;
		goto out;
	}


	cnss_pr_dbg("Dumping SBL log data");
	cnss_pr_dbg("Dumping SBL log data");
	for (i = 0; i < sbl_log_size; i += sizeof(val)) {
	for (i = 0; i < sbl_log_size; i += sizeof(val)) {
+5 −8
Original line number Original line Diff line number Diff line
/* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. */
/* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved. */


#ifndef _CNSS_REG_H
#ifndef _CNSS_REG_H
#define _CNSS_REG_H
#define _CNSS_REG_H
@@ -267,12 +267,8 @@
#define QCA6390_SYSPM_DBG_BUS_SEL_REG 0x1F82008
#define QCA6390_SYSPM_DBG_BUS_SEL_REG 0x1F82008
#define QCA6390_SYSPM_WCSSAON_SR_STATUS 0x1F8200C
#define QCA6390_SYSPM_WCSSAON_SR_STATUS 0x1F8200C


#define QCA6490_DEBUG_PBL_LOG_SRAM_START 0x1403D58
#define QCA6490_DEBUG_PBL_LOG_SRAM_START 0x01403DA0
#define QCA6490_DEBUG_PBL_LOG_SRAM_MAX_SIZE 40
#define QCA6490_DEBUG_PBL_LOG_SRAM_MAX_SIZE 40
#define QCA6490_V1_SBL_DATA_START 0x143b000
#define QCA6490_V1_SBL_DATA_END (0x143b000 + 0x00011000)
#define QCA6490_V2_SBL_DATA_START 0x1435000
#define QCA6490_V2_SBL_DATA_END (0x1435000 + 0x00011000)
#define QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE 48
#define QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE 48
#define QCA6490_TCSR_PBL_LOGGING_REG 0x01B000F8
#define QCA6490_TCSR_PBL_LOGGING_REG 0x01B000F8
#define QCA6490_PCIE_BHI_ERRDBG2_REG 0x01E0E238
#define QCA6490_PCIE_BHI_ERRDBG2_REG 0x01E0E238
@@ -282,12 +278,13 @@


#define QCA6390_DEBUG_PBL_LOG_SRAM_START 0x01403D58
#define QCA6390_DEBUG_PBL_LOG_SRAM_START 0x01403D58
#define QCA6390_DEBUG_PBL_LOG_SRAM_MAX_SIZE 80
#define QCA6390_DEBUG_PBL_LOG_SRAM_MAX_SIZE 80
#define QCA6390_V2_SBL_DATA_START 0x016c8580
#define QCA6390_V2_SBL_DATA_END (0x016c8580 + 0x00011000)
#define QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE 44
#define QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE 44
#define QCA6390_TCSR_PBL_LOGGING_REG 0x01B000F8
#define QCA6390_TCSR_PBL_LOGGING_REG 0x01B000F8
#define QCA6390_PCIE_BHI_ERRDBG2_REG 0x01E0E238
#define QCA6390_PCIE_BHI_ERRDBG2_REG 0x01E0E238
#define QCA6390_PCIE_BHI_ERRDBG3_REG 0x01E0E23C
#define QCA6390_PCIE_BHI_ERRDBG3_REG 0x01E0E23C
#define QCA6390_PBL_WLAN_BOOT_CFG    0x01E22B34
#define QCA6390_PBL_WLAN_BOOT_CFG    0x01E22B34
#define QCA6390_PBL_BOOTSTRAP_STATUS 0x01910008
#define QCA6390_PBL_BOOTSTRAP_STATUS 0x01910008

#define SRAM_START		0x01400000
#define SRAM_END		0x01800000
#endif
#endif