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Commit e5328c43 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Use GEN8_MASTER_IRQ_CONTROL consistently 



Use GEN8_MASTER_IRQ_CONTROL instead of DE_MASTER_IRQ_CONTROL or
MASTER_INTERRUPT_ENABLE with the GEN8_MASTER_IRQ register. They're
all bit 31 so there's no actual bug here, but let's be consistent
which name we use for the bit.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1460571598-24452-2-git-send-email-ville.syrjala@linux.intel.com


Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 297b32ec

drivers/gpu/drm/i915/i915_irq.c

+3 −3
Original line number Diff line number Diff line
@@ -1855,7 +1855,7 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg) 
		 * signalled in iir */

		valleyview_pipestat_irq_handler(dev, iir);



		I915_WRITE(GEN8_MASTER_IRQ, DE_MASTER_IRQ_CONTROL);

		I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);

		POSTING_READ(GEN8_MASTER_IRQ);

	} while (0);
@@ -3796,7 +3796,7 @@ static int gen8_irq_postinstall(struct drm_device *dev) 
	if (HAS_PCH_SPLIT(dev))

		ibx_irq_postinstall(dev);



	I915_WRITE(GEN8_MASTER_IRQ, DE_MASTER_IRQ_CONTROL);

	I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);

	POSTING_READ(GEN8_MASTER_IRQ);



	return 0;
@@ -3813,7 +3813,7 @@ static int cherryview_irq_postinstall(struct drm_device *dev) 
		vlv_display_irq_postinstall(dev_priv);

	spin_unlock_irq(&dev_priv->irq_lock);



	I915_WRITE(GEN8_MASTER_IRQ, MASTER_INTERRUPT_ENABLE);

	I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);

	POSTING_READ(GEN8_MASTER_IRQ);



	return 0;