Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e4ff1c39 authored by Arnaud Patard's avatar Arnaud Patard Committed by Nicolas Pitre
Browse files

ARM: kirkwood: Unbreak PCIe I/O port 



The support for the 2 pcie port of the 6282 has broken i/o port by switching
*_IO_PHYS_BASE and *_IO_BUS_BASE. In fact, the patches reintroduced the same
bug solved by commit 35f029e2.
So, I'm adding back *_IO_BUS_BASE in resource declaration and fix definition
of KIRKWOOD_PCIE1_IO_BUS_BASE. With this change, the xgi card on my t5325 is
working again.

Signed-off-by: default avatarArnaud Patard <arnaud.patard@rtp-net.org>
Acked-by: default avatarSaeed Bishara <saeed@marvell.com>
Signed-off-by: default avatarNicolas Pitre <nico@fluxnic.net>
Cc: stable@kernel.org
parent 49553c2e

arch/arm/mach-kirkwood/include/mach/kirkwood.h

+1 −1
Original line number Diff line number Diff line
@@ -38,7 +38,7 @@ 


#define KIRKWOOD_PCIE1_IO_PHYS_BASE	0xf3000000

#define KIRKWOOD_PCIE1_IO_VIRT_BASE	0xfef00000

#define KIRKWOOD_PCIE1_IO_BUS_BASE	0x00000000

#define KIRKWOOD_PCIE1_IO_BUS_BASE	0x00100000

#define KIRKWOOD_PCIE1_IO_SIZE		SZ_1M



#define KIRKWOOD_PCIE_IO_PHYS_BASE	0xf2000000

arch/arm/mach-kirkwood/pcie.c

+2 −2
Original line number Diff line number Diff line
@@ -117,7 +117,7 @@ static void __init pcie0_ioresources_init(struct pcie_port *pp) 
	 * IORESOURCE_IO

	 */

	pp->res[0].name = "PCIe 0 I/O Space";

	pp->res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE;

	pp->res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;

	pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;

	pp->res[0].flags = IORESOURCE_IO;
@@ -139,7 +139,7 @@ static void __init pcie1_ioresources_init(struct pcie_port *pp) 
	 * IORESOURCE_IO

	 */

	pp->res[0].name = "PCIe 1 I/O Space";

	pp->res[0].start = KIRKWOOD_PCIE1_IO_PHYS_BASE;

	pp->res[0].start = KIRKWOOD_PCIE1_IO_BUS_BASE;

	pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1;

	pp->res[0].flags = IORESOURCE_IO;