Commit e4f88d83 authored Dec 02, 2014 by Jungseok Lee Committed by Will Deacon Dec 03, 2014

arm64: Implement support for read-mostly sections



As putting data which is read mostly together, we can avoid
unnecessary cache line bouncing.

Other architectures, such as ARM and x86, adopted the same idea.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Jungseok Lee <jungseoklee85@gmail.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

parent a2d25a53

arch/arm64/include/asm/cache.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -32,6 +32,8 @@

		#ifndef __ASSEMBLY__

		#define __read_mostly __attribute__((__section__(".data..read_mostly")))

		static inline int cache_line_size(void)
		{
		u32 cwg = cache_type_cwg();