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Commit e3b2415e authored by Dave Airlie's avatar Dave Airlie
Browse files

drm/radeon/kms: implement the bo busy ioctl properly. 



The previous patch assumes the ioctl already existed, when
it actually didn't.

It also didn't return the correct error code.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 6c30c53f

drivers/gpu/drm/radeon/radeon_gem.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -283,7 +283,7 @@ int radeon_gem_busy_ioctl(struct drm_device *dev, void *data, 
	mutex_lock(&dev->struct_mutex);

	mutex_lock(&dev->struct_mutex);

	drm_gem_object_unreference(gobj);

	drm_gem_object_unreference(gobj);

	mutex_unlock(&dev->struct_mutex);

	mutex_unlock(&dev->struct_mutex);

	return 0;

	return r;

}

}





int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,

int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,

drivers/gpu/drm/radeon/radeon_kms.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -318,5 +318,6 @@ struct drm_ioctl_desc radeon_ioctls_kms[] = { 
	DRM_IOCTL_DEF(DRM_RADEON_INFO, radeon_info_ioctl, DRM_AUTH),

	DRM_IOCTL_DEF(DRM_RADEON_INFO, radeon_info_ioctl, DRM_AUTH),

	DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH),

	DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH),

	DRM_IOCTL_DEF(DRM_RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH),

	DRM_IOCTL_DEF(DRM_RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH),

	DRM_IOCTL_DEF(DRM_RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH),

};

};

int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);
 
int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);

include/drm/radeon_drm.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -508,6 +508,7 @@ typedef struct { 
#define DRM_RADEON_INFO			0x27

#define DRM_RADEON_INFO			0x27

#define DRM_RADEON_GEM_SET_TILING	0x28

#define DRM_RADEON_GEM_SET_TILING	0x28

#define DRM_RADEON_GEM_GET_TILING	0x29

#define DRM_RADEON_GEM_GET_TILING	0x29

#define DRM_RADEON_GEM_BUSY		0x2a





#define DRM_IOCTL_RADEON_CP_INIT    DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)

#define DRM_IOCTL_RADEON_CP_INIT    DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)

#define DRM_IOCTL_RADEON_CP_START   DRM_IO(  DRM_COMMAND_BASE + DRM_RADEON_CP_START)

#define DRM_IOCTL_RADEON_CP_START   DRM_IO(  DRM_COMMAND_BASE + DRM_RADEON_CP_START)
@@ -548,6 +549,7 @@ typedef struct { 
#define DRM_IOCTL_RADEON_INFO		DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info)

#define DRM_IOCTL_RADEON_INFO		DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info)

#define DRM_IOCTL_RADEON_SET_TILING	DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling)

#define DRM_IOCTL_RADEON_SET_TILING	DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling)

#define DRM_IOCTL_RADEON_GET_TILING	DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling)

#define DRM_IOCTL_RADEON_GET_TILING	DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling)

#define DRM_IOCTL_RADEON_GEM_BUSY	DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy)





typedef struct drm_radeon_init {

typedef struct drm_radeon_init {

	enum {

	enum {