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Commit e28e719e authored by Taniya Das's avatar Taniya Das
Browse files

ARM: dts: msm: Update GDSC status for LITO 



Update the GDSC status to disabled as they would be enabled from the
required device tree file. While at it also update the mdss gdsc with the
required functionalities.

Change-Id: I612c6886cb485c3e6856cc4c47f4ae37a8235c6c
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 6d8164b9

arch/arm64/boot/dts/qcom/lito-gdsc.dtsi

+21 −0
Original line number Diff line number Diff line
@@ -9,12 +9,14 @@ 
		compatible = "qcom,gdsc";

		reg = <0x177004 0x4>;

		regulator-name = "ufs_phy_gdsc";

		status = "disabled";

	};



	usb30_prim_gdsc: qcom,gdsc@10f004 {

		compatible = "qcom,gdsc";

		reg = <0x10f004 0x4>;

		regulator-name = "usb30_prim_gdsc";

		status = "disabled";

	};



	hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc: qcom,gdsc@17d050 {
@@ -23,6 +25,7 @@ 
		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <500>;

		status = "disabled";

	};



	hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc: qcom,gdsc@17d058 {
@@ -31,6 +34,7 @@ 
		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc";

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <500>;

		status = "disabled";

	};



	hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc: qcom,gdsc@17d054 {
@@ -39,6 +43,7 @@ 
		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc";

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <500>;

		status = "disabled";

	};



	/* CAM_CC GDSCs */
@@ -46,36 +51,42 @@ 
		compatible = "qcom,gdsc";

		reg = <0xad07004 0x4>;

		regulator-name = "bps_gdsc";

		status = "disabled";

	};



	ipe_0_gdsc: qcom,gdsc@ad08004 {

		compatible = "qcom,gdsc";

		reg = <0xad08004 0x4>;

		regulator-name = "ipe_0_gdsc";

		status = "disabled";

	};



	ipe_1_gdsc: qcom,gdsc@ad09004 {

		compatible = "qcom,gdsc";

		reg = <0xad09004 0x4>;

		regulator-name = "ipe_1_gdsc";

		status = "disabled";

	};



	ife_0_gdsc: qcom,gdsc@ad0a004 {

		compatible = "qcom,gdsc";

		reg = <0xad0a004 0x4>;

		regulator-name = "ife_0_gdsc";

		status = "disabled";

	};



	ife_1_gdsc: qcom,gdsc@ad0b004 {

		compatible = "qcom,gdsc";

		reg = <0xad0b004 0x4>;

		regulator-name = "ife_1_gdsc";

		status = "disabled";

	};



	titan_top_gdsc: qcom,gdsc@ad0c1c4 {

		compatible = "qcom,gdsc";

		reg = <0xad0c1c4 0x4>;

		regulator-name = "titan_top_gdsc";

		status = "disabled";

	};



	/* DISP_CC GDSC */
@@ -83,6 +94,10 @@ 
		compatible = "regulator-fixed";

		reg = <0xaf03000 0x4>;

		regulator-name = "mdss_core_gdsc";

		qcom,support-hw-trigger;

		proxy-supply = <&mdss_core_gdsc>;

		qcom,proxy-consumer-enable;

		status = "disabled";

	};



	/* GPU_CC GDSCs */
@@ -99,6 +114,7 @@ 
		qcom,no-status-check-on-disable;

		qcom,clk-dis-wait-val = <8>;

		qcom,gds-timeout = <500>;

		status = "disabled";

	};



	gpu_gx_domain_addr: syscon@3d91508 {
@@ -118,6 +134,7 @@ 
		domain-addr = <&gpu_gx_domain_addr>;

		sw-reset = <&gpu_gx_sw_reset>;

		qcom,reset-aon-logic;

		status = "disabled";

	};



	/* NPU GDSC */
@@ -125,6 +142,7 @@ 
		compatible = "regulator-fixed";

		reg = <0x9981004 0x4>;

		regulator-name = "npu_core_gdsc";

		status = "disabled";

	};



	/* VIDEO_CC GDSCs */
@@ -132,17 +150,20 @@ 
		compatible = "qcom,gdsc";

		reg = <0xab00814 0x4>;

		regulator-name = "mvsc_gdsc";

		status = "disabled";

	};



	mvs0_gdsc: qcom,gdsc@ab00874 {

		compatible = "qcom,gdsc";

		reg = <0xab00874 0x4>;

		regulator-name = "mvs0_gdsc";

		status = "disabled";

	};



	mvs1_gdsc: qcom,gdsc@ab008b4 {

		compatible = "qcom,gdsc";

		reg = <0xab008b4 0x4>;

		regulator-name = "mvs1_gdsc";

		status = "disabled";

	};

};