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Commit e16b31bf authored by Marc Zyngier's avatar Marc Zyngier Committed by Russell King
Browse files

ARM: 7876/1: clear Thumb-2 IT state on exception handling 



The exception handling code fails to clear the IT state, potentially
leading to incorrect execution of the fixup if the size of the IT
block is more than one.

Let fixup_exception do the IT sanitizing if a fixup has been found,
and restore CPSR from the stack when returning from a data abort.

Cc: Will Deacon <will.deacon@arm.com>
Cc: stable@vger.kernel.org
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 384b38b6

arch/arm/kernel/entry-armv.S

+1 −0
Original line number Diff line number Diff line
@@ -192,6 +192,7 @@ __dabt_svc: 
	svc_entry

	mov	r2, sp

	dabt_helper

 THUMB(	ldr	r5, [sp, #S_PSR]	)	@ potentially updated CPSR

	svc_exit r5				@ return from exception

 UNWIND(.fnend		)

ENDPROC(__dabt_svc)

arch/arm/mm/extable.c

+6 −1
Original line number Diff line number Diff line
@@ -9,8 +9,13 @@ int fixup_exception(struct pt_regs *regs) 
	const struct exception_table_entry *fixup;



	fixup = search_exception_tables(instruction_pointer(regs));

	if (fixup)

	if (fixup) {

		regs->ARM_pc = fixup->fixup;

#ifdef CONFIG_THUMB2_KERNEL

		/* Clear the IT state to avoid nasty surprises in the fixup */

		regs->ARM_cpsr &= ~PSR_IT_MASK;

#endif

	}



	return fixup != NULL;

}