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Commit e0dfb20c authored by Atsushi Nemoto's avatar Atsushi Nemoto Committed by Ralf Baechle
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MIPS: TXx9: Improve handling of built-in and command-line args 



* Make prom_init_cmdline() static and be called from prom_init.
* Append built-in args if the first character was '+'.
* Drop command-line args if the first character of built-in was '-'.
* Enclose args include spaces by quotes.
* TX4938_NAND_BOOT is no longer needed.

Signed-off-by: default avatarAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent f96a3383

arch/mips/txx9/Kconfig

+0 −7
Original line number Diff line number Diff line
@@ -97,13 +97,6 @@ config TOSHIBA_RBTX4938_MPLEX_ATA 


endchoice



config TX4938_NAND_BOOT

	depends on EXPERIMENTAL && TOSHIBA_RBTX4938_MPLEX_NAND

	bool "NAND Boot Support (EXPERIMENTAL)"

	help

	  This is only for Toshiba RBTX4938 reference board, which has NAND IPL.

	  Select this option if you need to use NAND boot.



endif



config PCI_TX4927

arch/mips/txx9/generic/setup.c

+31 −11
Original line number Diff line number Diff line
@@ -127,31 +127,51 @@ extern struct txx9_board_vec rbtx4938_vec; 
struct txx9_board_vec *txx9_board_vec __initdata;

static char txx9_system_type[32];



void __init prom_init_cmdline(void)

static void __init prom_init_cmdline(void)

{

	int argc = (int)fw_arg0;

	char **argv = (char **)fw_arg1;

	int *argv32 = (int *)fw_arg1;

	int i;			/* Always ignore the "-c" at argv[0] */

#ifdef CONFIG_64BIT

	char *fixed_argv[32];

	for (i = 0; i < argc; i++)

		fixed_argv[i] = (char *)(long)(*((__s32 *)argv + i));

	argv = fixed_argv;

#endif

	char builtin[CL_SIZE];



	/* ignore all built-in args if any f/w args given */

	if (argc > 1)

		*arcs_cmdline = '\0';

	/*

	 * But if built-in strings was started with '+', append them

	 * to command line args.  If built-in was started with '-',

	 * ignore all f/w args.

	 */

	builtin[0] = '\0';

	if (arcs_cmdline[0] == '+')

		strcpy(builtin, arcs_cmdline + 1);

	else if (arcs_cmdline[0] == '-') {

		strcpy(builtin, arcs_cmdline + 1);

		argc = 0;

	} else if (argc <= 1)

		strcpy(builtin, arcs_cmdline);

	arcs_cmdline[0] = '\0';



	for (i = 1; i < argc; i++) {

		char *str = (char *)(long)argv32[i];

		if (i != 1)

			strcat(arcs_cmdline, " ");

		strcat(arcs_cmdline, argv[i]);

		if (strchr(str, ' ')) {

			strcat(arcs_cmdline, "\"");

			strcat(arcs_cmdline, str);

			strcat(arcs_cmdline, "\"");

		} else

			strcat(arcs_cmdline, str);

	}

	/* append saved builtin args */

	if (builtin[0]) {

		if (arcs_cmdline[0])

			strcat(arcs_cmdline, " ");

		strcat(arcs_cmdline, builtin);

	}

}



void __init prom_init(void)

{

	prom_init_cmdline();

#ifdef CONFIG_CPU_TX39XX

	txx9_board_vec = &jmr3927_vec;

#endif

arch/mips/txx9/jmr3927/prom.c

+0 −1
Original line number Diff line number Diff line
@@ -47,7 +47,6 @@ void __init jmr3927_prom_init(void) 
	if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)

		printk(KERN_ERR "TX3927 TLB off\n");



	prom_init_cmdline();

	add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM);

	txx9_sio_putchar_init(TX3927_SIO_REG(1));

}

arch/mips/txx9/rbtx4927/prom.c

+0 −1
Original line number Diff line number Diff line
@@ -36,7 +36,6 @@ 


void __init rbtx4927_prom_init(void)

{

	prom_init_cmdline();

	add_memory_region(0, tx4927_get_mem_size(), BOOT_MEM_RAM);

	txx9_sio_putchar_init(TX4927_SIO_REG(0) & 0xfffffffffULL);

}

arch/mips/txx9/rbtx4938/prom.c

+0 −3
Original line number Diff line number Diff line
@@ -18,9 +18,6 @@ 


void __init rbtx4938_prom_init(void)

{

#ifndef CONFIG_TX4938_NAND_BOOT

	prom_init_cmdline();

#endif

	add_memory_region(0, tx4938_get_mem_size(), BOOT_MEM_RAM);

	txx9_sio_putchar_init(TX4938_SIO_REG(0) & 0xfffffffffULL);

}