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Commit e0b9c210 authored by Shiraz Hashim's avatar Shiraz Hashim Committed by Mike Turquette
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CLK: SPEAr13xx: Fix mux clock names 



This patch updates mux clock names of multiple clocks. It updates _clk with
_mclk to make it more readable.

Signed-off-by: default avatarShiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: default avatarRajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent df2449ab

drivers/clk/spear/spear1310_clock.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -633,7 +633,7 @@ void __init spear1310_clk_init(void) 
			ARRAY_SIZE(clcd_pixel_parents), 0,

			ARRAY_SIZE(clcd_pixel_parents), 0,

			SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT,

			SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT,

			SPEAR1310_CLCD_CLK_MASK, 0, &_lock);

			SPEAR1310_CLCD_CLK_MASK, 0, &_lock);

	clk_register_clkdev(clk, "clcd_pixel_clk", NULL);

	clk_register_clkdev(clk, "clcd_pixel_mclk", NULL);





	clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,

	clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,

			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CLCD_CLK_ENB, 0,

			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CLCD_CLK_ENB, 0,
@@ -645,7 +645,7 @@ void __init spear1310_clk_init(void) 
			ARRAY_SIZE(i2s_src_parents), 0, SPEAR1310_I2S_CLK_CFG,

			ARRAY_SIZE(i2s_src_parents), 0, SPEAR1310_I2S_CLK_CFG,

			SPEAR1310_I2S_SRC_CLK_SHIFT, SPEAR1310_I2S_SRC_CLK_MASK,

			SPEAR1310_I2S_SRC_CLK_SHIFT, SPEAR1310_I2S_SRC_CLK_MASK,

			0, &_lock);

			0, &_lock);

	clk_register_clkdev(clk, "i2s_src_clk", NULL);

	clk_register_clkdev(clk, "i2s_src_mclk", NULL);





	clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0,

	clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0,

			SPEAR1310_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl,

			SPEAR1310_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl,

drivers/clk/spear/spear1340_clock.c

+10 −10
Original line number Original line Diff line number Diff line
@@ -521,7 +521,7 @@ void __init spear1340_clk_init(void) 
			ARRAY_SIZE(sys_parents), 0, SPEAR1340_SYS_CLK_CTRL,

			ARRAY_SIZE(sys_parents), 0, SPEAR1340_SYS_CLK_CTRL,

			SPEAR1340_SCLK_SRC_SEL_SHIFT,

			SPEAR1340_SCLK_SRC_SEL_SHIFT,

			SPEAR1340_SCLK_SRC_SEL_MASK, 0, &_lock);

			SPEAR1340_SCLK_SRC_SEL_MASK, 0, &_lock);

	clk_register_clkdev(clk, "sys_clk", NULL);

	clk_register_clkdev(clk, "sys_mclk", NULL);





	clk = clk_register_fixed_factor(NULL, "cpu_clk", "sys_mclk", 0, 1,

	clk = clk_register_fixed_factor(NULL, "cpu_clk", "sys_mclk", 0, 1,

			2);

			2);
@@ -697,7 +697,7 @@ void __init spear1340_clk_init(void) 
			ARRAY_SIZE(clcd_pixel_parents), 0,

			ARRAY_SIZE(clcd_pixel_parents), 0,

			SPEAR1340_PERIP_CLK_CFG, SPEAR1340_CLCD_CLK_SHIFT,

			SPEAR1340_PERIP_CLK_CFG, SPEAR1340_CLCD_CLK_SHIFT,

			SPEAR1340_CLCD_CLK_MASK, 0, &_lock);

			SPEAR1340_CLCD_CLK_MASK, 0, &_lock);

	clk_register_clkdev(clk, "clcd_pixel_clk", NULL);

	clk_register_clkdev(clk, "clcd_pixel_mclk", NULL);





	clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,

	clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,

			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CLCD_CLK_ENB, 0,

			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CLCD_CLK_ENB, 0,
@@ -709,7 +709,7 @@ void __init spear1340_clk_init(void) 
			ARRAY_SIZE(i2s_src_parents), 0, SPEAR1340_I2S_CLK_CFG,

			ARRAY_SIZE(i2s_src_parents), 0, SPEAR1340_I2S_CLK_CFG,

			SPEAR1340_I2S_SRC_CLK_SHIFT, SPEAR1340_I2S_SRC_CLK_MASK,

			SPEAR1340_I2S_SRC_CLK_SHIFT, SPEAR1340_I2S_SRC_CLK_MASK,

			0, &_lock);

			0, &_lock);

	clk_register_clkdev(clk, "i2s_src_clk", NULL);

	clk_register_clkdev(clk, "i2s_src_mclk", NULL);





	clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0,

	clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0,

			SPEAR1340_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl,

			SPEAR1340_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl,
@@ -720,7 +720,7 @@ void __init spear1340_clk_init(void) 
			ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1340_I2S_CLK_CFG,

			ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1340_I2S_CLK_CFG,

			SPEAR1340_I2S_REF_SHIFT, SPEAR1340_I2S_REF_SEL_MASK, 0,

			SPEAR1340_I2S_REF_SHIFT, SPEAR1340_I2S_REF_SEL_MASK, 0,

			&_lock);

			&_lock);

	clk_register_clkdev(clk, "i2s_ref_clk", NULL);

	clk_register_clkdev(clk, "i2s_ref_mclk", NULL);





	clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0,

	clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0,

			SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_I2S_REF_PAD_CLK_ENB,

			SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_I2S_REF_PAD_CLK_ENB,
@@ -846,30 +846,30 @@ void __init spear1340_clk_init(void) 
			ARRAY_SIZE(gen_synth0_1_parents), 0, SPEAR1340_PLL_CFG,

			ARRAY_SIZE(gen_synth0_1_parents), 0, SPEAR1340_PLL_CFG,

			SPEAR1340_GEN_SYNT0_1_CLK_SHIFT,

			SPEAR1340_GEN_SYNT0_1_CLK_SHIFT,

			SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock);

			SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock);

	clk_register_clkdev(clk, "gen_syn0_1_clk", NULL);

	clk_register_clkdev(clk, "gen_syn0_1_mclk", NULL);





	clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents,

	clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents,

			ARRAY_SIZE(gen_synth2_3_parents), 0, SPEAR1340_PLL_CFG,

			ARRAY_SIZE(gen_synth2_3_parents), 0, SPEAR1340_PLL_CFG,

			SPEAR1340_GEN_SYNT2_3_CLK_SHIFT,

			SPEAR1340_GEN_SYNT2_3_CLK_SHIFT,

			SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock);

			SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock);

	clk_register_clkdev(clk, "gen_syn2_3_clk", NULL);

	clk_register_clkdev(clk, "gen_syn2_3_mclk", NULL);





	clk = clk_register_frac("gen_syn0_clk", "gen_syn0_1_clk", 0,

	clk = clk_register_frac("gen_syn0_clk", "gen_syn0_1_mclk", 0,

			SPEAR1340_GEN_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl),

			SPEAR1340_GEN_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl),

			&_lock);

			&_lock);

	clk_register_clkdev(clk, "gen_syn0_clk", NULL);

	clk_register_clkdev(clk, "gen_syn0_clk", NULL);





	clk = clk_register_frac("gen_syn1_clk", "gen_syn0_1_clk", 0,

	clk = clk_register_frac("gen_syn1_clk", "gen_syn0_1_mclk", 0,

			SPEAR1340_GEN_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl),

			SPEAR1340_GEN_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl),

			&_lock);

			&_lock);

	clk_register_clkdev(clk, "gen_syn1_clk", NULL);

	clk_register_clkdev(clk, "gen_syn1_clk", NULL);





	clk = clk_register_frac("gen_syn2_clk", "gen_syn2_3_clk", 0,

	clk = clk_register_frac("gen_syn2_clk", "gen_syn2_3_mclk", 0,

			SPEAR1340_GEN_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl),

			SPEAR1340_GEN_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl),

			&_lock);

			&_lock);

	clk_register_clkdev(clk, "gen_syn2_clk", NULL);

	clk_register_clkdev(clk, "gen_syn2_clk", NULL);





	clk = clk_register_frac("gen_syn3_clk", "gen_syn2_3_clk", 0,

	clk = clk_register_frac("gen_syn3_clk", "gen_syn2_3_mclk", 0,

			SPEAR1340_GEN_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl),

			SPEAR1340_GEN_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl),

			&_lock);

			&_lock);

	clk_register_clkdev(clk, "gen_syn3_clk", NULL);

	clk_register_clkdev(clk, "gen_syn3_clk", NULL);