Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit dfa10480 authored by Ander Conselvan de Oliveira's avatar Ander Conselvan de Oliveira Committed by Rodrigo Vivi
Browse files

drm/i915: Don't pass crtc_state to intel_dp_set_link_params() 



Decouple intel_dp_set_link_params() from struct intel_crtc_state. This
will be useful for implementing DP upfront link training.

v2:
* Rebased on atomic state changes (Manasi)

Reviewed-by: default avatarDurgadoss R <durgadoss.r@intel.com>
Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: default avatarManasi Navare <manasi.d.navare@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 23f889bd

drivers/gpu/drm/i915/intel_ddi.c

+4 −1
Original line number Original line Diff line number Diff line
@@ -1639,7 +1639,10 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder, 




		intel_prepare_dp_ddi_buffers(intel_encoder);

		intel_prepare_dp_ddi_buffers(intel_encoder);





		intel_dp_set_link_params(intel_dp, crtc->config);

		intel_dp_set_link_params(intel_dp, crtc->config->port_clock,

					 crtc->config->lane_count,

					 intel_crtc_has_type(crtc->config,

							     INTEL_OUTPUT_DP_MST));





		intel_ddi_init_dp_buf_reg(intel_encoder);

		intel_ddi_init_dp_buf_reg(intel_encoder);

drivers/gpu/drm/i915/intel_dp.c

+9 −5
Original line number Original line Diff line number Diff line
@@ -1641,11 +1641,12 @@ intel_dp_compute_config(struct intel_encoder *encoder, 
}

}





void intel_dp_set_link_params(struct intel_dp *intel_dp,

void intel_dp_set_link_params(struct intel_dp *intel_dp,

			      const struct intel_crtc_state *pipe_config)

			      int link_rate, uint8_t lane_count,

			      bool link_mst)

{

{

	intel_dp->link_rate = pipe_config->port_clock;

	intel_dp->link_rate = link_rate;

	intel_dp->lane_count = pipe_config->lane_count;

	intel_dp->lane_count = lane_count;

	intel_dp->link_mst = intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST);

	intel_dp->link_mst = link_mst;

}

}





static void intel_dp_prepare(struct intel_encoder *encoder,

static void intel_dp_prepare(struct intel_encoder *encoder,
@@ -1658,7 +1659,10 @@ static void intel_dp_prepare(struct intel_encoder *encoder, 
	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);

	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);

	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;

	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;





	intel_dp_set_link_params(intel_dp, pipe_config);

	intel_dp_set_link_params(intel_dp, pipe_config->port_clock,

				 pipe_config->lane_count,

				 intel_crtc_has_type(pipe_config,

						     INTEL_OUTPUT_DP_MST));





	/*

	/*

	 * There are four kinds of DP registers:

	 * There are four kinds of DP registers:

drivers/gpu/drm/i915/intel_dp_mst.c

+4 −2
Original line number Original line Diff line number Diff line
@@ -153,8 +153,10 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder, 
		intel_ddi_clk_select(&intel_dig_port->base, pipe_config);

		intel_ddi_clk_select(&intel_dig_port->base, pipe_config);





		intel_prepare_dp_ddi_buffers(&intel_dig_port->base);

		intel_prepare_dp_ddi_buffers(&intel_dig_port->base);



		intel_dp_set_link_params(intel_dp,

		intel_dp_set_link_params(intel_dp, pipe_config);

					 pipe_config->port_clock,

					 pipe_config->lane_count,

					 true);





		intel_ddi_init_dp_buf_reg(&intel_dig_port->base);

		intel_ddi_init_dp_buf_reg(&intel_dig_port->base);

drivers/gpu/drm/i915/intel_drv.h

+2 −1
Original line number Original line Diff line number Diff line
@@ -1383,7 +1383,8 @@ bool intel_dp_init(struct drm_device *dev, i915_reg_t output_reg, enum port port 
bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,

bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,

			     struct intel_connector *intel_connector);

			     struct intel_connector *intel_connector);

void intel_dp_set_link_params(struct intel_dp *intel_dp,

void intel_dp_set_link_params(struct intel_dp *intel_dp,

			      const struct intel_crtc_state *pipe_config);

			      int link_rate, uint8_t lane_count,

			      bool link_mst);

void intel_dp_start_link_train(struct intel_dp *intel_dp);

void intel_dp_start_link_train(struct intel_dp *intel_dp);

void intel_dp_stop_link_train(struct intel_dp *intel_dp);

void intel_dp_stop_link_train(struct intel_dp *intel_dp);

void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);

void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);