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Commit df6e2c4a authored by Junwei Zhang's avatar Junwei Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: export gfx config double offchip LDS buffers (v3) 



v2: move the config struct to drm_amdgpu_info_device
v3: move the config feature to amdgpu_gca_config

Signed-off-by: default avatarJunwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 24de7515

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+3 −0
Original line number Diff line number Diff line
@@ -845,6 +845,9 @@ struct amdgpu_gca_config { 
	uint32_t macrotile_mode_array[16];



	struct amdgpu_rb_config rb_config[AMDGPU_GFX_MAX_SE][AMDGPU_GFX_MAX_SH_PER_SE];



	/* gfx configure feature */

	uint32_t double_offchip_lds_buf;

};



struct amdgpu_cu_info {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

+2 −0
Original line number Diff line number Diff line
@@ -528,6 +528,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file 
		dev_info.vram_type = adev->mc.vram_type;

		dev_info.vram_bit_width = adev->mc.vram_width;

		dev_info.vce_harvest_config = adev->vce.harvest_config;

		dev_info.gc_double_offchip_lds_buf =

			adev->gfx.config.double_offchip_lds_buf;



		return copy_to_user(out, &dev_info,

				    min((size_t)size, sizeof(dev_info))) ? -EFAULT : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

+6 −0
Original line number Diff line number Diff line
@@ -1579,6 +1579,11 @@ static void gfx_v6_0_setup_spi(struct amdgpu_device *adev) 
	mutex_unlock(&adev->grbm_idx_mutex);

}



static void gfx_v6_0_config_init(struct amdgpu_device *adev)

{

	adev->gfx.config.double_offchip_lds_buf = 1;

}



static void gfx_v6_0_gpu_init(struct amdgpu_device *adev)

{

	u32 gb_addr_config = 0;
@@ -1736,6 +1741,7 @@ static void gfx_v6_0_gpu_init(struct amdgpu_device *adev) 
	gfx_v6_0_setup_spi(adev);



	gfx_v6_0_get_cu_info(adev);

	gfx_v6_0_config_init(adev);



	WREG32(mmCP_QUEUE_THRESHOLDS, ((0x16 << CP_QUEUE_THRESHOLDS__ROQ_IB1_START__SHIFT) |

				       (0x2b << CP_QUEUE_THRESHOLDS__ROQ_IB2_START__SHIFT)));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+6 −0
Original line number Diff line number Diff line
@@ -1876,6 +1876,11 @@ static void gmc_v7_0_init_compute_vmid(struct amdgpu_device *adev) 
	mutex_unlock(&adev->srbm_mutex);

}



static void gfx_v7_0_config_init(struct amdgpu_device *adev)

{

	adev->gfx.config.double_offchip_lds_buf = 1;

}



/**

 * gfx_v7_0_gpu_init - setup the 3D engine

 *
@@ -1899,6 +1904,7 @@ static void gfx_v7_0_gpu_init(struct amdgpu_device *adev) 


	gfx_v7_0_setup_rb(adev);

	gfx_v7_0_get_cu_info(adev);

	gfx_v7_0_config_init(adev);



	/* set HW defaults for 3D engine */

	WREG32(mmCP_MEQ_THRESHOLDS,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+14 −0
Original line number Diff line number Diff line
@@ -3846,6 +3846,19 @@ static void gfx_v8_0_init_compute_vmid(struct amdgpu_device *adev) 
	mutex_unlock(&adev->srbm_mutex);

}



static void gfx_v8_0_config_init(struct amdgpu_device *adev)

{

	switch (adev->asic_type) {

	default:

		adev->gfx.config.double_offchip_lds_buf = 1;

		break;

	case CHIP_CARRIZO:

	case CHIP_STONEY:

		adev->gfx.config.double_offchip_lds_buf = 0;

		break;

	}

}



static void gfx_v8_0_gpu_init(struct amdgpu_device *adev)

{

	u32 tmp;
@@ -3859,6 +3872,7 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev) 
	gfx_v8_0_tiling_mode_table_init(adev);

	gfx_v8_0_setup_rb(adev);

	gfx_v8_0_get_cu_info(adev);

	gfx_v8_0_config_init(adev);



	/* XXX SH_MEM regs */

	/* where to put LDS, scratch, GPUVM in FSA64 space */