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Commit df1e6394 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: delete eventmgr layer in poweprlay 



Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cd00a424

drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h

+2 −2
Original line number Diff line number Diff line
@@ -383,8 +383,8 @@ struct amdgpu_dpm_funcs { 
#define amdgpu_dpm_set_mclk_od(adev, value) \

	((adev)->powerplay.pp_funcs->set_mclk_od((adev)->powerplay.pp_handle, value))



#define amdgpu_dpm_dispatch_task(adev, event_id, input, output)		\

	(adev)->powerplay.pp_funcs->dispatch_tasks((adev)->powerplay.pp_handle, (event_id), (input), (output))

#define amdgpu_dpm_dispatch_task(adev, task_id, input, output)		\

	((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (input), (output))



#define amgdpu_dpm_check_state_equal(adev, cps, rps, equal) (adev)->pm.funcs->check_state_equal((adev), (cps),(rps),(equal))

drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

+5 −5
Original line number Diff line number Diff line
@@ -119,7 +119,7 @@ static ssize_t amdgpu_set_dpm_state(struct device *dev, 
	}



	if (adev->pp_enabled) {

		amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_ENABLE_USER_STATE, &state, NULL);

		amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state, NULL);

	} else {

		mutex_lock(&adev->pm.mutex);

		adev->pm.dpm.user_state = state;
@@ -330,7 +330,7 @@ static ssize_t amdgpu_set_pp_force_state(struct device *dev, 
		if (state != POWER_STATE_TYPE_INTERNAL_BOOT &&

		    state != POWER_STATE_TYPE_DEFAULT) {

			amdgpu_dpm_dispatch_task(adev,

					AMD_PP_EVENT_ENABLE_USER_STATE, &state, NULL);

					AMD_PP_TASK_ENABLE_USER_STATE, &state, NULL);

			adev->pp_force_state_enabled = true;

		}

	}
@@ -559,7 +559,7 @@ static ssize_t amdgpu_set_pp_sclk_od(struct device *dev, 


	if (adev->pp_enabled) {

		amdgpu_dpm_set_sclk_od(adev, (uint32_t)value);

		amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_READJUST_POWER_STATE, NULL, NULL);

		amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);

	} else if (adev->pm.funcs->set_sclk_od) {

		adev->pm.funcs->set_sclk_od(adev, (uint32_t)value);

		adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
@@ -605,7 +605,7 @@ static ssize_t amdgpu_set_pp_mclk_od(struct device *dev, 


	if (adev->pp_enabled) {

		amdgpu_dpm_set_mclk_od(adev, (uint32_t)value);

		amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_READJUST_POWER_STATE, NULL, NULL);

		amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);

	} else if (adev->pm.funcs->set_mclk_od) {

		adev->pm.funcs->set_mclk_od(adev, (uint32_t)value);

		adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
@@ -1496,7 +1496,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev) 
	}



	if (adev->pp_enabled) {

		amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_DISPLAY_CONFIG_CHANGE, NULL, NULL);

		amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL, NULL);

	} else {

		mutex_lock(&adev->pm.mutex);

		adev->pm.dpm.new_active_crtcs = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c

+1 −1
Original line number Diff line number Diff line
@@ -128,7 +128,7 @@ static int amdgpu_pp_late_init(void *handle) 


	if (adev->pp_enabled && adev->pm.dpm_enabled) {

		amdgpu_pm_sysfs_init(adev);

		amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_COMPLETE_INIT, NULL, NULL);

		amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_COMPLETE_INIT, NULL, NULL);

	}



	return ret;

drivers/gpu/drm/amd/powerplay/Makefile

+2 −3
Original line number Diff line number Diff line
@@ -4,12 +4,11 @@ subdir-ccflags-y += \ 
		-I$(FULL_AMD_PATH)/include/asic_reg  \

		-I$(FULL_AMD_PATH)/include  \

		-I$(FULL_AMD_PATH)/powerplay/smumgr\

		-I$(FULL_AMD_PATH)/powerplay/hwmgr \

		-I$(FULL_AMD_PATH)/powerplay/eventmgr

		-I$(FULL_AMD_PATH)/powerplay/hwmgr



AMD_PP_PATH = ../powerplay



PP_LIBS = smumgr hwmgr eventmgr

PP_LIBS = smumgr hwmgr



AMD_POWERPLAY = $(addsuffix /Makefile,$(addprefix $(FULL_AMD_PATH)/powerplay/,$(PP_LIBS)))

drivers/gpu/drm/amd/powerplay/amd_powerplay.c

+12 −100
Original line number Diff line number Diff line
@@ -29,7 +29,6 @@ 
#include "amd_powerplay.h"

#include "pp_instance.h"

#include "power_state.h"

#include "eventmanager.h"





static inline int pp_check(struct pp_instance *handle)
@@ -43,8 +42,7 @@ static inline int pp_check(struct pp_instance *handle) 
	if (handle->pm_en == 0)

		return PP_DPM_DISABLED;



	if (handle->hwmgr == NULL || handle->hwmgr->hwmgr_func == NULL

		|| handle->eventmgr == NULL)

	if (handle->hwmgr == NULL || handle->hwmgr->hwmgr_func == NULL)

		return PP_DPM_DISABLED;



	return 0;
@@ -69,14 +67,6 @@ static int pp_early_init(void *handle) 
		return PP_DPM_DISABLED;

	}



	ret = eventmgr_early_init(pp_handle);

	if (ret) {

		kfree(pp_handle->hwmgr);

		pp_handle->hwmgr = NULL;

		pp_handle->pm_en = 0;

		return PP_DPM_DISABLED;

	}



	return 0;

}
@@ -122,7 +112,6 @@ static int pp_sw_fini(void *handle) 
static int pp_hw_init(void *handle)

{

	struct pp_smumgr *smumgr;

	struct pp_eventmgr *eventmgr;

	int ret = 0;

	struct pp_instance *pp_handle = (struct pp_instance *)handle;
@@ -146,38 +135,23 @@ static int pp_hw_init(void *handle) 
	ret = hwmgr_hw_init(pp_handle);

	if (ret)

		goto err;



	eventmgr = pp_handle->eventmgr;

	if (eventmgr->pp_eventmgr_init == NULL ||

		eventmgr->pp_eventmgr_init(eventmgr))

		goto err;



	return 0;

err:

	pp_handle->pm_en = 0;

	kfree(pp_handle->eventmgr);

	kfree(pp_handle->hwmgr);

	pp_handle->hwmgr = NULL;

	pp_handle->eventmgr = NULL;

	return PP_DPM_DISABLED;

}



static int pp_hw_fini(void *handle)

{

	struct pp_eventmgr *eventmgr;

	struct pp_instance *pp_handle = (struct pp_instance *)handle;

	int ret = 0;



	ret = pp_check(pp_handle);



	if (ret == 0) {

		eventmgr = pp_handle->eventmgr;



		if (eventmgr->pp_eventmgr_fini != NULL)

			eventmgr->pp_eventmgr_fini(eventmgr);



	if (ret == 0)

		hwmgr_hw_fini(pp_handle);

	}



	return 0;

}
@@ -244,8 +218,6 @@ static int pp_set_powergating_state(void *handle, 


static int pp_suspend(void *handle)

{

	struct pp_eventmgr *eventmgr;

	struct pem_event_data event_data = { {0} };

	struct pp_instance *pp_handle = (struct pp_instance *)handle;

	int ret = 0;
@@ -256,16 +228,11 @@ static int pp_suspend(void *handle) 
	else if (ret != 0)

		return ret;



	eventmgr = pp_handle->eventmgr;

	pem_handle_event(eventmgr, AMD_PP_EVENT_SUSPEND, &event_data);



	return 0;

	return hwmgr_hw_suspend(pp_handle);

}



static int pp_resume(void *handle)

{

	struct pp_eventmgr *eventmgr;

	struct pem_event_data event_data = { {0} };

	struct pp_smumgr *smumgr;

	int ret, ret1;

	struct pp_instance *pp_handle = (struct pp_instance *)handle;
@@ -290,11 +257,7 @@ static int pp_resume(void *handle) 
	if (ret1 == PP_DPM_DISABLED)

		return 0;



	eventmgr = pp_handle->eventmgr;



	pem_handle_event(eventmgr, AMD_PP_EVENT_RESUME, &event_data);



	return 0;

	return hwmgr_hw_resume(pp_handle);

}



const struct amd_ip_funcs pp_ip_funcs = {
@@ -344,6 +307,7 @@ static int pp_dpm_force_performance_level(void *handle, 
	}



	mutex_lock(&pp_handle->pp_lock);

	hwmgr_handle_task(pp_handle, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);

	hwmgr->hwmgr_func->force_dpm_level(hwmgr, level);

	mutex_unlock(&pp_handle->pp_lock);

	return 0;
@@ -461,60 +425,21 @@ static int pp_dpm_powergate_uvd(void *handle, bool gate) 
	return ret;

}



static enum PP_StateUILabel power_state_convert(enum amd_pm_state_type  state)

{

	switch (state) {

	case POWER_STATE_TYPE_BATTERY:

		return PP_StateUILabel_Battery;

	case POWER_STATE_TYPE_BALANCED:

		return PP_StateUILabel_Balanced;

	case POWER_STATE_TYPE_PERFORMANCE:

		return PP_StateUILabel_Performance;

	default:

		return PP_StateUILabel_None;

	}

}



static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id,

static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,

		void *input, void *output)

{

	int ret = 0;

	struct pem_event_data data = { {0} };

	struct pp_instance *pp_handle = (struct pp_instance *)handle;



	ret = pp_check(pp_handle);



	if (ret != 0)

		return ret;

	mutex_lock(&pp_handle->pp_lock);

	switch (event_id) {

	case AMD_PP_EVENT_DISPLAY_CONFIG_CHANGE:

		ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);

		break;

	case AMD_PP_EVENT_ENABLE_USER_STATE:

	{

		enum amd_pm_state_type  ps;



		if (input == NULL) {

			ret = -EINVAL;

			break;

		}

		ps = *(unsigned long *)input;



		data.requested_ui_label = power_state_convert(ps);

		ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);

		break;

	}

	case AMD_PP_EVENT_COMPLETE_INIT:

		ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);

		break;

	case AMD_PP_EVENT_READJUST_POWER_STATE:

		ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);

		break;

	default:

		break;

	}

	mutex_lock(&pp_handle->pp_lock);

	ret = hwmgr_handle_task(pp_handle, task_id, input, output);

	mutex_unlock(&pp_handle->pp_lock);



	return ret;

}
@@ -1190,10 +1115,8 @@ int amd_powerplay_destroy(void *handle) 
	struct pp_instance *instance = (struct pp_instance *)handle;



	if (instance->pm_en) {

		kfree(instance->eventmgr);

		kfree(instance->hwmgr);

		instance->hwmgr = NULL;

		instance->eventmgr = NULL;

	}



	kfree(instance->smu_mgr);
@@ -1206,8 +1129,6 @@ int amd_powerplay_destroy(void *handle) 
int amd_powerplay_reset(void *handle)

{

	struct pp_instance *instance = (struct pp_instance *)handle;

	struct pp_eventmgr *eventmgr;

	struct pem_event_data event_data = { {0} };

	int ret;



	if (cgs_is_virtualization_enabled(instance->smu_mgr->device))
@@ -1217,7 +1138,7 @@ int amd_powerplay_reset(void *handle) 
	if (ret != 0)

		return ret;



	ret = pp_hw_fini(handle);

	ret = pp_hw_fini(instance);

	if (ret)

		return ret;
@@ -1225,16 +1146,7 @@ int amd_powerplay_reset(void *handle) 
	if (ret)

		return PP_DPM_DISABLED;



	eventmgr = instance->eventmgr;



	if (eventmgr->pp_eventmgr_init == NULL)

		return PP_DPM_DISABLED;



	ret = eventmgr->pp_eventmgr_init(eventmgr);

	if (ret)

		return ret;



	return pem_handle_event(eventmgr, AMD_PP_EVENT_COMPLETE_INIT, &event_data);

	return hwmgr_handle_task(instance, AMD_PP_TASK_COMPLETE_INIT, NULL, NULL);

}



/* export this function to DAL */