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Commit dd72be99 authored by Bin Gao's avatar Bin Gao Committed by Bjorn Helgaas
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x86/pci/mrst: Use configuration mechanism 1 for 00:00.0, 00:02.0, 00:03.0 



For real PCI devices 00:00.0, 00:02.0 and 00:03.0, there is either no
PCI shim, or no guarantee of data correctness of offset 256-4k.  So for
whatever reason, Linux kernel should not do MMCFG PCI config access to
those devices.  Instead, always use configuration mechanism 1 for those
devices.

The 00:00.0, 00:02.0 and 00:03.0 devices are built-in single-function
devices and are not PCI-PCI bridges, so this set of devices should be
complete.

Signed-off-by: default avatarBin Gao <bin.gao@linux.intel.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent e5f66eaf

arch/x86/pci/mrst.c

+6 −4
Original line number Diff line number Diff line
@@ -141,6 +141,11 @@ static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn, 
 */

static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg)

{

	if (bus == 0 && (devfn == PCI_DEVFN(2, 0)

				|| devfn == PCI_DEVFN(0, 0)

				|| devfn == PCI_DEVFN(3, 0)))

		return 1;



	/* This is a workaround for A0 LNC bug where PCI status register does

	 * not have new CAP bit set. can not be written by SW either.

	 *
@@ -150,10 +155,7 @@ static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg) 
	 */

	if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE)

		return 0;

	if (bus == 0 && (devfn == PCI_DEVFN(2, 0)

				|| devfn == PCI_DEVFN(0, 0)

				|| devfn == PCI_DEVFN(3, 0)))

		return 1;



	return 0; /* langwell on others */

}