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Commit dd5f57c4 authored by Brett Creeley's avatar Brett Creeley Committed by Greg Kroah-Hartman
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iavf: Fix cached head and tail value for iavf_get_tx_pending



[ Upstream commit 809f23c0423a43266e47a7dc67e95b5cb4d1cbfc ]

The underlying hardware may or may not allow reading of the head or tail
registers and it really makes no difference if we use the software
cached values. So, always used the software cached values.

Fixes: 9c6c1259 ("i40e: Detection and recovery of TX queue hung logic moved to service_task from tx_timeout")
Signed-off-by: default avatarBrett Creeley <brett.creeley@intel.com>
Co-developed-by: default avatarNorbert Zulinski <norbertx.zulinski@intel.com>
Signed-off-by: default avatarNorbert Zulinski <norbertx.zulinski@intel.com>
Signed-off-by: default avatarMateusz Palczewski <mateusz.palczewski@intel.com>
Tested-by: default avatarKonrad Jankowski <konrad0.jankowski@intel.com>
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 468adf7a
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+4 −1
Original line number Diff line number Diff line
@@ -115,8 +115,11 @@ u32 i40evf_get_tx_pending(struct i40e_ring *ring, bool in_sw)
{
	u32 head, tail;

	/* underlying hardware might not allow access and/or always return
	 * 0 for the head/tail registers so just use the cached values
	 */
	head = ring->next_to_clean;
	tail = readl(ring->tail);
	tail = ring->next_to_use;

	if (head != tail)
		return (head < tail) ?