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Commit dd41fb85 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux into drm-next 



Last feature request for 4.18.  Mostly vega20 support.
- Vega20 support
- clock and powergating for VCN
- misc bug fixes

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180524152427.32713-1-alexander.deucher@amd.com
parents ce234ccc b8f3439f

drivers/gpu/drm/amd/amdgpu/Makefile

+4 −2
Original line number Diff line number Diff line
@@ -62,11 +62,13 @@ amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \ 
amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o



amdgpu-y += \

	vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o

	vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \

	vega20_reg_init.o



# add DF block

amdgpu-y += \

	df_v1_7.o

	df_v1_7.o \

	df_v3_6.o



# add GMC block

amdgpu-y += \

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+2 −0
Original line number Diff line number Diff line
@@ -1401,6 +1401,8 @@ struct amdgpu_df_funcs { 
						 bool enable);

	void (*get_clockgating_state)(struct amdgpu_device *adev,

				      u32 *flags);

	void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev,

					    bool enable);

};

/* Define the HW IP blocks will be used in driver , add more if necessary */

enum amd_hw_ip_block_type {

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

+44 −0
Original line number Diff line number Diff line
@@ -322,3 +322,47 @@ int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev) 


	return ret;

}



union gfx_info {

	struct  atom_gfx_info_v2_4 v24;

};



int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev)

{

	struct amdgpu_mode_info *mode_info = &adev->mode_info;

	int index;

	uint8_t frev, crev;

	uint16_t data_offset;



	index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,

					    gfx_info);

	if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL,

				   &frev, &crev, &data_offset)) {

		union gfx_info *gfx_info = (union gfx_info *)

			(mode_info->atom_context->bios + data_offset);

		switch (crev) {

		case 4:

			adev->gfx.config.max_shader_engines = gfx_info->v24.gc_num_se;

			adev->gfx.config.max_cu_per_sh = gfx_info->v24.gc_num_cu_per_sh;

			adev->gfx.config.max_sh_per_se = gfx_info->v24.gc_num_sh_per_se;

			adev->gfx.config.max_backends_per_se = gfx_info->v24.gc_num_rb_per_se;

			adev->gfx.config.max_texture_channel_caches = gfx_info->v24.gc_num_tccs;

			adev->gfx.config.max_gprs = le16_to_cpu(gfx_info->v24.gc_num_gprs);

			adev->gfx.config.max_gs_threads = gfx_info->v24.gc_num_max_gs_thds;

			adev->gfx.config.gs_vgt_table_depth = gfx_info->v24.gc_gs_table_depth;

			adev->gfx.config.gs_prim_buffer_depth =

				le16_to_cpu(gfx_info->v24.gc_gsprim_buff_depth);

			adev->gfx.config.double_offchip_lds_buf =

				gfx_info->v24.gc_double_offchip_lds_buffer;

			adev->gfx.cu_info.wave_front_size = le16_to_cpu(gfx_info->v24.gc_wave_size);

			adev->gfx.cu_info.max_waves_per_simd = le16_to_cpu(gfx_info->v24.gc_max_waves_per_simd);

			adev->gfx.cu_info.max_scratch_slots_per_cu = gfx_info->v24.gc_max_scratch_slots_per_cu;

			adev->gfx.cu_info.lds_size = le16_to_cpu(gfx_info->v24.gc_lds_size);

			return 0;

		default:

			return -EINVAL;

		}



	}

	return -EINVAL;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h

+1 −0
Original line number Diff line number Diff line
@@ -30,5 +30,6 @@ int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev); 
int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev);

int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev);

int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);

int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev);



#endif

drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c

+3 −0
Original line number Diff line number Diff line
@@ -400,6 +400,9 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device, 
			case CHIP_VEGA12:

				strcpy(fw_name, "amdgpu/vega12_smc.bin");

				break;

			case CHIP_VEGA20:

				strcpy(fw_name, "amdgpu/vega20_smc.bin");

				break;

			default:

				DRM_ERROR("SMC firmware not supported\n");

				return -EINVAL;