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Commit dd1d2f44 authored by Jan Altenberg's avatar Jan Altenberg Committed by Russell King
Browse files

[ARM] at91: correct value for AT91_RSTC_KEY 



- Remove a duplicated define for AT91_RSTC_KEY
- Set AT91_RSTC_KEY to the correct value
- Replace the hardcoded keys in at91sam9620.c and at91sam9261.c
  by AT91_RSTC_KEY

Signed-off-by: default avatarJan Altenberg <jan@linutronix.de>
Acked-by: default avatarAndrew Victor <andrew@sanpeople.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent f1e13986

arch/arm/mach-at91/at91sam9260.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -259,7 +259,7 @@ static struct at91_gpio_bank at91sam9260_gpio[] = { 




static void at91sam9260_reset(void)

static void at91sam9260_reset(void)

{

{

	at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);

	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);

}

}

arch/arm/mach-at91/at91sam9261.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -225,7 +225,7 @@ static struct at91_gpio_bank at91sam9261_gpio[] = { 




static void at91sam9261_reset(void)

static void at91sam9261_reset(void)

{

{

	at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);

	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);

}

}

include/asm-arm/arch-at91/at91_rstc.h

+1 −2
Original line number Original line Diff line number Diff line
@@ -17,7 +17,7 @@ 
#define		AT91_RSTC_PROCRST	(1 << 0)		/* Processor Reset */

#define		AT91_RSTC_PROCRST	(1 << 0)		/* Processor Reset */

#define		AT91_RSTC_PERRST	(1 << 2)		/* Peripheral Reset */

#define		AT91_RSTC_PERRST	(1 << 2)		/* Peripheral Reset */

#define		AT91_RSTC_EXTRST	(1 << 3)		/* External Reset */

#define		AT91_RSTC_EXTRST	(1 << 3)		/* External Reset */

#define		AT91_RSTC_KEY		(0xff << 24)		/* KEY Password */

#define		AT91_RSTC_KEY		(0xa5 << 24)		/* KEY Password */





#define AT91_RSTC_SR		(AT91_RSTC + 0x04)	/* Reset Controller Status Register */

#define AT91_RSTC_SR		(AT91_RSTC + 0x04)	/* Reset Controller Status Register */

#define		AT91_RSTC_URSTS		(1 << 0)		/* User Reset Status */

#define		AT91_RSTC_URSTS		(1 << 0)		/* User Reset Status */
@@ -34,6 +34,5 @@ 
#define		AT91_RSTC_URSTEN	(1 << 0)		/* User Reset Enable */

#define		AT91_RSTC_URSTEN	(1 << 0)		/* User Reset Enable */

#define		AT91_RSTC_URSTIEN	(1 << 4)		/* User Reset Interrupt Enable */

#define		AT91_RSTC_URSTIEN	(1 << 4)		/* User Reset Interrupt Enable */

#define		AT91_RSTC_ERSTL		(0xf << 8)		/* External Reset Length */

#define		AT91_RSTC_ERSTL		(0xf << 8)		/* External Reset Length */

#define		AT91_RSTC_KEY		(0xff << 24)		/* KEY Password */





#endif
 
#endif