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Commit dd123129 authored by Andrzej Hajda's avatar Andrzej Hajda Committed by Archit Taneja
Browse files

drm/bridge/sii8620: simplify MHL3 mode setting 



It is not necessary to set REG_COC_CTL0, REG_MHL_COC_CTL1 registers.

Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: default avatarArchit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1485935272-17337-2-git-send-email-a.hajda@samsung.com
parent cbdded7f

drivers/gpu/drm/bridge/sil-sii8620.c

+2 −6
Original line number Diff line number Diff line
@@ -974,12 +974,8 @@ static void sii8620_set_mode(struct sii8620 *ctx, enum sii8620_mode mode) 
		);

		break;

	case CM_MHL3:

		sii8620_write_seq_static(ctx,

			REG_M3_CTRL, VAL_M3_CTRL_MHL3_VALUE,

			REG_COC_CTL0, 0x40,

			REG_MHL_COC_CTL1, 0x07

		);

		break;

		sii8620_write(ctx, REG_M3_CTRL, VAL_M3_CTRL_MHL3_VALUE);

		return;

	case CM_DISCONNECTED:

		break;

	default: