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Commit dc7cec23 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge remote branch 'intel/drm-intel-fixes' of /ssd/git/drm-next into drm-fixes 

* 'intel/drm-intel-fixes' of /ssd/git/drm-next:
  drm/i915: Fix resume regression from 5d1d0cc8
  drm/i915/tv: Use polling rather than interrupt-based hotplug
  drm/i915: Trigger modesetting if force-audio changes
  drm/i915/sdvo: If we have an EDID confirm it matches the mode of the connection
  drm/i915: Disable RC6 on Ironlake
  drm/i915/lvds: Restore dithering on native modes for gen2/3
  drm/i915: Invalidate TLB caches on SNB BLT/BSD rings
parents c2049b3d 04dbff52

drivers/gpu/drm/i915/i915_drv.c

+4 −1
Original line number Diff line number Diff line
@@ -46,6 +46,9 @@ module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400); 
unsigned int i915_powersave = 1;

module_param_named(powersave, i915_powersave, int, 0600);



unsigned int i915_enable_rc6 = 0;

module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600);



unsigned int i915_lvds_downclock = 0;

module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
@@ -360,7 +363,7 @@ static int i915_drm_thaw(struct drm_device *dev) 
		/* Resume the modeset for every activated CRTC */

		drm_helper_resume_force_mode(dev);



		if (dev_priv->renderctx && dev_priv->pwrctx)

		if (IS_IRONLAKE_M(dev))

			ironlake_enable_rc6(dev);

	}

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -958,6 +958,7 @@ extern unsigned int i915_fbpercrtc; 
extern unsigned int i915_powersave;

extern unsigned int i915_lvds_downclock;

extern unsigned int i915_panel_use_ssc;

extern unsigned int i915_enable_rc6;



extern int i915_suspend(struct drm_device *dev, pm_message_t state);

extern int i915_resume(struct drm_device *dev);

drivers/gpu/drm/i915/i915_reg.h

+3 −1
Original line number Diff line number Diff line
@@ -174,7 +174,9 @@ 
 *   address/value pairs. Don't overdue it, though, x <= 2^4 must hold!

 */

#define MI_LOAD_REGISTER_IMM(x)	MI_INSTR(0x22, 2*x-1)

#define MI_FLUSH_DW		MI_INSTR(0x26, 2) /* for GEN6 */

#define MI_FLUSH_DW		MI_INSTR(0x26, 1) /* for GEN6 */

#define   MI_INVALIDATE_TLB	(1<<18)

#define   MI_INVALIDATE_BSD	(1<<7)

#define MI_BATCH_BUFFER		MI_INSTR(0x30, 1)

#define   MI_BATCH_NON_SECURE	(1)

#define   MI_BATCH_NON_SECURE_I965 (1<<8)

drivers/gpu/drm/i915/intel_display.c

+51 −44
Original line number Diff line number Diff line
@@ -5558,9 +5558,7 @@ static void intel_crtc_reset(struct drm_crtc *crtc) 
	/* Reset flags back to the 'unknown' status so that they

	 * will be correctly set on the initial modeset.

	 */

	intel_crtc->cursor_addr = 0;

	intel_crtc->dpms_mode = -1;

	intel_crtc->active = true; /* force the pipe off on setup_init_config */

}



static struct drm_crtc_helper_funcs intel_helper_funcs = {
@@ -5666,6 +5664,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) 
	dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = &intel_crtc->base;



	intel_crtc_reset(&intel_crtc->base);

	intel_crtc->active = true; /* force the pipe off on setup_init_config */



	if (HAS_PCH_SPLIT(dev)) {

		intel_helper_funcs.prepare = ironlake_crtc_prepare;
@@ -6463,29 +6462,19 @@ void intel_enable_clock_gating(struct drm_device *dev) 
	}

}



void intel_disable_clock_gating(struct drm_device *dev)

static void ironlake_teardown_rc6(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;



	if (dev_priv->renderctx) {

		struct drm_i915_gem_object *obj = dev_priv->renderctx;



		I915_WRITE(CCID, 0);

		POSTING_READ(CCID);



		i915_gem_object_unpin(obj);

		drm_gem_object_unreference(&obj->base);

		i915_gem_object_unpin(dev_priv->renderctx);

		drm_gem_object_unreference(&dev_priv->renderctx->base);

		dev_priv->renderctx = NULL;

	}



	if (dev_priv->pwrctx) {

		struct drm_i915_gem_object *obj = dev_priv->pwrctx;



		I915_WRITE(PWRCTXA, 0);

		POSTING_READ(PWRCTXA);



		i915_gem_object_unpin(obj);

		drm_gem_object_unreference(&obj->base);

		i915_gem_object_unpin(dev_priv->pwrctx);

		drm_gem_object_unreference(&dev_priv->pwrctx->base);

		dev_priv->pwrctx = NULL;

	}

}
@@ -6494,21 +6483,39 @@ static void ironlake_disable_rc6(struct drm_device *dev) 
{

	struct drm_i915_private *dev_priv = dev->dev_private;



	if (I915_READ(PWRCTXA)) {

		/* Wake the GPU, prevent RC6, then restore RSTDBYCTL */

		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) | RCX_SW_EXIT);

		wait_for(((I915_READ(RSTDBYCTL) & RSX_STATUS_MASK) == RSX_STATUS_ON),

		 10);

	POSTING_READ(CCID);

			 50);



		I915_WRITE(PWRCTXA, 0);

		POSTING_READ(PWRCTXA);



		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);

		POSTING_READ(RSTDBYCTL);

	i915_gem_object_unpin(dev_priv->renderctx);

	drm_gem_object_unreference(&dev_priv->renderctx->base);

	dev_priv->renderctx = NULL;

	i915_gem_object_unpin(dev_priv->pwrctx);

	drm_gem_object_unreference(&dev_priv->pwrctx->base);

	dev_priv->pwrctx = NULL;

	}



	ironlake_disable_rc6(dev);

}



static int ironlake_setup_rc6(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;



	if (dev_priv->renderctx == NULL)

		dev_priv->renderctx = intel_alloc_context_page(dev);

	if (!dev_priv->renderctx)

		return -ENOMEM;



	if (dev_priv->pwrctx == NULL)

		dev_priv->pwrctx = intel_alloc_context_page(dev);

	if (!dev_priv->pwrctx) {

		ironlake_teardown_rc6(dev);

		return -ENOMEM;

	}



	return 0;

}



void ironlake_enable_rc6(struct drm_device *dev)
@@ -6516,15 +6523,26 @@ void ironlake_enable_rc6(struct drm_device *dev) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	int ret;



	/* rc6 disabled by default due to repeated reports of hanging during

	 * boot and resume.

	 */

	if (!i915_enable_rc6)

		return;



	ret = ironlake_setup_rc6(dev);

	if (ret)

		return;



	/*

	 * GPU can automatically power down the render unit if given a page

	 * to save state.

	 */

	ret = BEGIN_LP_RING(6);

	if (ret) {

		ironlake_disable_rc6(dev);

		ironlake_teardown_rc6(dev);

		return;

	}



	OUT_RING(MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);

	OUT_RING(MI_SET_CONTEXT);

	OUT_RING(dev_priv->renderctx->gtt_offset |
@@ -6541,6 +6559,7 @@ void ironlake_enable_rc6(struct drm_device *dev) 
	I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);

}





/* Set up chip specific display functions */

static void intel_init_display(struct drm_device *dev)

{
@@ -6783,21 +6802,9 @@ void intel_modeset_init(struct drm_device *dev) 
	if (IS_GEN6(dev))

		gen6_enable_rps(dev_priv);



	if (IS_IRONLAKE_M(dev)) {

		dev_priv->renderctx = intel_alloc_context_page(dev);

		if (!dev_priv->renderctx)

			goto skip_rc6;

		dev_priv->pwrctx = intel_alloc_context_page(dev);

		if (!dev_priv->pwrctx) {

			i915_gem_object_unpin(dev_priv->renderctx);

			drm_gem_object_unreference(&dev_priv->renderctx->base);

			dev_priv->renderctx = NULL;

			goto skip_rc6;

		}

	if (IS_IRONLAKE_M(dev))

		ironlake_enable_rc6(dev);

	}



skip_rc6:

	INIT_WORK(&dev_priv->idle_work, intel_idle_update);

	setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer,

		    (unsigned long)dev);

drivers/gpu/drm/i915/intel_dp.c

+30 −6
Original line number Diff line number Diff line
@@ -1639,6 +1639,24 @@ static int intel_dp_get_modes(struct drm_connector *connector) 
	return 0;

}



static bool

intel_dp_detect_audio(struct drm_connector *connector)

{

	struct intel_dp *intel_dp = intel_attached_dp(connector);

	struct edid *edid;

	bool has_audio = false;



	edid = drm_get_edid(connector, &intel_dp->adapter);

	if (edid) {

		has_audio = drm_detect_monitor_audio(edid);



		connector->display_info.raw_edid = NULL;

		kfree(edid);

	}



	return has_audio;

}



static int

intel_dp_set_property(struct drm_connector *connector,

		      struct drm_property *property,
@@ -1652,17 +1670,23 @@ intel_dp_set_property(struct drm_connector *connector, 
		return ret;



	if (property == intel_dp->force_audio_property) {

		if (val == intel_dp->force_audio)

		int i = val;

		bool has_audio;



		if (i == intel_dp->force_audio)

			return 0;



		intel_dp->force_audio = val;

		intel_dp->force_audio = i;



		if (val > 0 && intel_dp->has_audio)

			return 0;

		if (val < 0 && !intel_dp->has_audio)

		if (i == 0)

			has_audio = intel_dp_detect_audio(connector);

		else

			has_audio = i > 0;



		if (has_audio == intel_dp->has_audio)

			return 0;



		intel_dp->has_audio = val > 0;

		intel_dp->has_audio = has_audio;

		goto done;

	}