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Commit dc7b0387 authored by Thierry Reding's avatar Thierry Reding Committed by Linus Walleij
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gpio: Move irq_valid_mask into struct gpio_irq_chip



In order to consolidate the multiple ways to associate an IRQ chip with
a GPIO chip, move more fields into the new struct gpio_irq_chip.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Acked-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent dc6bafee
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+2 −2
Original line number Diff line number Diff line
@@ -313,8 +313,8 @@ symbol:
  mark all the child IRQs as having the other IRQ as parent.

If there is a need to exclude certain GPIOs from the IRQ domain, you can
set .irq_need_valid_mask of the gpiochip before gpiochip_add_data() is
called. This allocates an .irq_valid_mask with as many bits set as there
set .irq.need_valid_mask of the gpiochip before gpiochip_add_data() is
called. This allocates an .irq.valid_mask with as many bits set as there
are GPIOs in the chip. Drivers can exclude GPIOs by clearing bits from this
mask. The mask must be filled in before gpiochip_irqchip_add() or
gpiochip_irqchip_add_nested() is called.
+2 −2
Original line number Diff line number Diff line
@@ -501,7 +501,7 @@ static void set_irq_valid_mask(struct aspeed_gpio *gpio)
			if (i >= gpio->config->nr_gpios)
				break;

			clear_bit(i, gpio->chip.irq_valid_mask);
			clear_bit(i, gpio->chip.irq.valid_mask);
		}

		props++;
@@ -856,7 +856,7 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev)
	gpio->chip.set_config = aspeed_gpio_set_config;
	gpio->chip.label = dev_name(&pdev->dev);
	gpio->chip.base = -1;
	gpio->chip.irq_need_valid_mask = true;
	gpio->chip.irq.need_valid_mask = true;

	rc = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);
	if (rc < 0)
+2 −2
Original line number Diff line number Diff line
@@ -451,7 +451,7 @@ static int stmpe_gpio_probe(struct platform_device *pdev)
	of_property_read_u32(np, "st,norequest-mask",
			&stmpe_gpio->norequest_mask);
	if (stmpe_gpio->norequest_mask)
		stmpe_gpio->chip.irq_need_valid_mask = true;
		stmpe_gpio->chip.irq.need_valid_mask = true;

	if (irq < 0)
		dev_info(&pdev->dev,
@@ -482,7 +482,7 @@ static int stmpe_gpio_probe(struct platform_device *pdev)
			/* Forbid unused lines to be mapped as IRQs */
			for (i = 0; i < sizeof(u32); i++)
				if (stmpe_gpio->norequest_mask & BIT(i))
					clear_bit(i, stmpe_gpio->chip.irq_valid_mask);
					clear_bit(i, stmpe_gpio->chip.irq.valid_mask);
		}
		ret =  gpiochip_irqchip_add_nested(&stmpe_gpio->chip,
						   &stmpe_gpio_irq_chip,
+8 −8
Original line number Diff line number Diff line
@@ -1504,33 +1504,33 @@ static struct gpio_chip *find_chip_by_name(const char *name)

static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
{
	if (!gpiochip->irq_need_valid_mask)
	if (!gpiochip->irq.need_valid_mask)
		return 0;

	gpiochip->irq_valid_mask = kcalloc(BITS_TO_LONGS(gpiochip->ngpio),
	gpiochip->irq.valid_mask = kcalloc(BITS_TO_LONGS(gpiochip->ngpio),
					   sizeof(long), GFP_KERNEL);
	if (!gpiochip->irq_valid_mask)
	if (!gpiochip->irq.valid_mask)
		return -ENOMEM;

	/* Assume by default all GPIOs are valid */
	bitmap_fill(gpiochip->irq_valid_mask, gpiochip->ngpio);
	bitmap_fill(gpiochip->irq.valid_mask, gpiochip->ngpio);

	return 0;
}

static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
{
	kfree(gpiochip->irq_valid_mask);
	gpiochip->irq_valid_mask = NULL;
	kfree(gpiochip->irq.valid_mask);
	gpiochip->irq.valid_mask = NULL;
}

static bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
				       unsigned int offset)
{
	/* No mask means all valid */
	if (likely(!gpiochip->irq_valid_mask))
	if (likely(!gpiochip->irq.valid_mask))
		return true;
	return test_bit(offset, gpiochip->irq_valid_mask);
	return test_bit(offset, gpiochip->irq.valid_mask);
}

/**
+2 −2
Original line number Diff line number Diff line
@@ -1660,7 +1660,7 @@ static void byt_gpio_irq_init_hw(struct byt_gpio *vg)

		value = readl(reg);
		if (value & BYT_DIRECT_IRQ_EN) {
			clear_bit(i, gc->irq_valid_mask);
			clear_bit(i, gc->irq.valid_mask);
			dev_dbg(dev, "excluding GPIO %d from IRQ domain\n", i);
		} else if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i)) {
			byt_gpio_clear_triggering(vg, i);
@@ -1703,7 +1703,7 @@ static int byt_gpio_probe(struct byt_gpio *vg)
	gc->can_sleep	= false;
	gc->parent	= &vg->pdev->dev;
	gc->ngpio	= vg->soc_data->npins;
	gc->irq_need_valid_mask	= true;
	gc->irq.need_valid_mask	= true;

#ifdef CONFIG_PM_SLEEP
	vg->saved_context = devm_kcalloc(&vg->pdev->dev, gc->ngpio,
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